A system-level approach to hardware reconfigurable systems

Haubelt C, Otto S, Grabbe C, Teich J (2005)


Publication Status: Published

Publication Type: Conference contribution, Conference Contribution

Publication year: 2005

Book Volume: 1

Pages Range: 298-301

Article Number: 1466177

Conference Proceedings Title: Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC'05)

Event location: Shanghai CN

ISBN: 9780780387362

URI: https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=84861440285&origin=inward

Abstract

There is trend towards networked and distributed hardware reconfigurable systems, complicating the design process at the system-level. This paper will provide a solution to the problem of design space exploration for such embedded systems of the next generation. We will show the problems occurring while exploring the design space at the system-level, leading to new properties for valid implementations. The novelty of this approach lies in the support of explicit communication modeling and time-multiplexed architecture modeling in a single model. The proposed design space exploration is based on Evolutionary Algorithms and a new slack-based list scheduler. © 2005 IEEE.

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APA:

Haubelt, C., Otto, S., Grabbe, C., & Teich, J. (2005). A system-level approach to hardware reconfigurable systems. In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC'05) (pp. 298-301). Shanghai, CN.

MLA:

Haubelt, Christian, et al. "A system-level approach to hardware reconfigurable systems." Proceedings of the 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005, Shanghai 2005. 298-301.

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