Domain-Specific Augmentations for High-Level Synthesis

Schmid M, Tanase AP, Hannig F, Teich J, Bhadouria VS, Ghoshal D (2014)

Publication Type: Conference contribution

Publication year: 2014

Journal

International Conference on Application-Specific Systems, Architectures and Processors, Proceedings Institute of Electrical and Electronics Engineers

Publisher: Institute of Electrical and Electronics Engineers

Edited Volumes: Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors

City/Town: New York, NY, USA

Pages Range: 173-177

Conference Proceedings Title: Proc. of the 25th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP)

Event location: Zurich CH

DOI: 10.1109/ASAP.2014.6868653

Abstract

High-Level Synthesis (HLS) has become a very popular instrument to facilitate rapid development of production-ready implementations for FPGAs. Ever increasing flexibility of the frameworks, however, demands a very high level of domain-specific knowledge from the designer. Examples for such knowledge in window-based image processing are median computation and border handling. Depending on the size of the considered window, writing the code to perform such operations may become overwhelming even at very high abstraction levels. To increase productivity and to make the underlying architecture accessible to non-experts, we propose to combine HLS with domain-specific augmentations. Specifically, we propose a new language extension in form of a reduction for sorting and median computation. Furthermore, we introduce a new high-level transformation to perform multiple kinds of border treatment automatically. Both augmentations may reduce the required amount of code lines considerably. The increase in productivity is analyzed by comparing the lines of code necessary to specify a median filter for HLS in PAULA for synthesis using PARO and in C++ for synthesis using a commercial HLS tool. © 2014 IEEE.

Authors with CRIS profile

Moritz Schmid Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design) Alexandru-Petru Tanase Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design) Frank Hannig Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design) Jürgen Teich Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Related research project(s)

Dedizierte massiv parallele Systeme (PARO) Jan. 3, 2000 - Jan. 3, 2003

Involved external institutions

National Institute of Technology Agartala (NITA) IN India (IN)

How to cite

APA:

Schmid, M., Tanase, A.-P., Hannig, F., Teich, J., Bhadouria, V.S., & Ghoshal, D. (2014). Domain-Specific Augmentations for High-Level Synthesis. In Proc. of the 25th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) (pp. 173-177). Zurich, CH: New York, NY, USA: Institute of Electrical and Electronics Engineers.

MLA:

Schmid, Moritz, et al. "Domain-Specific Augmentations for High-Level Synthesis." Proceedings of the 25th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), Zurich New York, NY, USA: Institute of Electrical and Electronics Engineers, 2014. 173-177.

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