Symbolic loop parallelization of static control programs

Beitrag bei einer Tagung


Details zur Publikation

Autor(en): Tanase AP, Hannig F, Teich J
Verlag: Academia Press
Verlagsort: Ghent, Belgium
Jahr der Veröffentlichung: 2012
Tagungsband: Proc. of the 8th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES)
Seitenbereich: 33-36
ISBN: 978-90-382-1987-5


FAU-Autoren / FAU-Herausgeber

Hannig, Frank PD Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Tanase, Alexandru-Petru Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Teich, Jürgen Prof. Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


Zitierweisen

APA:
Tanase, A.-P., Hannig, F., & Teich, J. (2012). Symbolic loop parallelization of static control programs. In Proc. of the 8th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES) (pp. 33-36). Fiuggi, IT: Ghent, Belgium: Academia Press.

MLA:
Tanase, Alexandru-Petru, Frank Hannig, and Jürgen Teich. "Symbolic loop parallelization of static control programs." Proceedings of the 8th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES), Fiuggi Ghent, Belgium: Academia Press, 2012. 33-36.

BibTeX: 

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