LIKWID: A Lightweight Performance-Oriented Tool Suite for x86 Multicore Environments

Eitzinger J, Hager G, Wellein G (2010)


Publication Type: Conference contribution

Publication year: 2010

Publisher: icppw

Edited Volumes: Proceedings of the International Conference on Parallel Processing Workshops

City/Town: IEEE

Pages Range: 207-216

Conference Proceedings Title: Proceedings of PSTI2010, the First International Workshop on Parallel Software Tools and Tool Infrastructures

Event location: San Diego, CA, USA

ISBN: 978-0-7695-4157-0

URI: http://arxiv.org/abs/1004.4431

DOI: 10.1109/ICPPW.2010.38

Abstract

Exploiting the performance of today's processors requires intimate knowledge of the microarchitecture as well as an awareness of the ever-growing complexity in thread and cache topology. LIKWID is a set of command-line utilities that addresses four key problems: Probing the thread and cache topology of a shared-memory node, enforcing threadcore affinity on a program, measuring performance counter metrics, and toggling hardware prefetchers. An API for using the performance counting features from user code is also included. We clearly state the differences to the widely used PAPI interface. To demonstrate the capabilities of the tool set we show the influence of thread pinning on performance using the well-known OpenMP STREAM triad benchmark, and use the affinity and hardware counter tools to study the performance of a stencil code specifically optimized to utilize shared caches on multicore chips. © 2010 IEEE.

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How to cite

APA:

Eitzinger, J., Hager, G., & Wellein, G. (2010). LIKWID: A Lightweight Performance-Oriented Tool Suite for x86 Multicore Environments. In Proceedings of PSTI2010, the First International Workshop on Parallel Software Tools and Tool Infrastructures (pp. 207-216). San Diego, CA, USA: IEEE: icppw.

MLA:

Eitzinger, Jan, Georg Hager, and Gerhard Wellein. "LIKWID: A Lightweight Performance-Oriented Tool Suite for x86 Multicore Environments." Proceedings of the 39th International Conference on Parallel Processing Workshops, San Diego, CA, USA IEEE: icppw, 2010. 207-216.

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