A Deeply Pipelined and Parallel Architecture for Denoising Medical Images

Hannig F, Schmid M, Teich J, Hornegger H (2010)


Publication Type: Conference contribution

Publication year: 2010

Edited Volumes: Proceedings - 2010 International Conference on Field-Programmable Technology, FPT'10

Pages Range: 485-490

Conference Proceedings Title: Proc. IEEE International Conference on Field Programmable Technology

Event location: Beijing CN

ISBN: 978-1-4244-8982-4

DOI: 10.1109/FPT.2010.5681464

Abstract

In this paper we present an almost automatic synthesis of a highly complex, throughput optimized architecture of an adaptive multiresolution filter as used in medical image processing for FPGAs. The filter consists of 16 parallel working modules, where the most computationally intensive module achieves software pipelining of a factor of 85, that is, computations of 85 iterations overlap each other. By applying a state-of-the-art high-level synthesis tool, we show that this approach can be used for real world applications. In addition, we show that our high-level synthesis tool is capable of significantly reducing the well known productivity gap of embedded system design by almost two orders of magnitude. Finally, we can conclude that the FPGA implementation of the multiresolution image processing algorithm is far ahead of a comparable implementation for graphics cards in terms of power efficiency. © 2010 IEEE.

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APA:

Hannig, F., Schmid, M., Teich, J., & Hornegger, H. (2010). A Deeply Pipelined and Parallel Architecture for Denoising Medical Images. In Proc. IEEE International Conference on Field Programmable Technology (pp. 485-490). Beijing, CN.

MLA:

Hannig, Frank, et al. "A Deeply Pipelined and Parallel Architecture for Denoising Medical Images." Proceedings of the IEEE International Conference on Field Programmable Technology (FPT'10), Beijing 2010. 485-490.

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