Advanced lithography models for strict process control in the 32nm technology node

Patsis GP, Drygiannakis D, Raptis T, Gogoliddes E, Erdmann A (2009)


Publication Type: Journal article

Publication year: 2009

Journal

Book Volume: 86

Pages Range: 513

DOI: 10.1016/j.mee.2009.01.050

How to cite

APA:

Patsis, G.P., Drygiannakis, D., Raptis, T., Gogoliddes, E., & Erdmann, A. (2009). Advanced lithography models for strict process control in the 32nm technology node. Microelectronic Engineering, 86, 513. https://dx.doi.org/10.1016/j.mee.2009.01.050

MLA:

Patsis, G. P., et al. "Advanced lithography models for strict process control in the 32nm technology node." Microelectronic Engineering 86 (2009): 513.

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