Resource-Aware Programming and Simulation of MPSoC Architectures through Extension of X10

Beitrag bei einer Tagung


Details zur Publikation

Autor(en): Hannig F, Roloff S, Snelting G, Teich J, Zwinkau A
Titel Sammelwerk: Proceedings of the 14th International Workshop on Software and Compilers for Embedded Systems, SCOPES 2011
Verlag: ACM
Verlagsort: New York, NY, USA
Jahr der Veröffentlichung: 2011
Titel der Reihe: SCOPES'11
Tagungsband: Proceedings of the 14th International Workshop on Software and Compilers for Embedded Systems
Seitenbereich: 48-55
ISBN: 978-1-4503-0763-5


Abstract


The efficient use of future MPSoCs with f 000 or more processor cores requires new means of resource-aware programming to deal with increasing imperfections such as process variation, fault rates, aging effects, and power as well as thermal problems. In this paper, we apply a new approach called invasive computing that enables an application programmer to spread computations to processors deliberately and on purpose at certain points of the program. Such decisions can be made depending on the degree of application parallelism and the state of the underlying resources such as utilization, load, and temperature. The introduced programming constructs for resource-aware programming are embedded into the parallel computing language X10 as developed by IBM using a library-based approach. Moreover, we show how individual heterogeneous MPSoC architectures may be modeled for subsequent functional simulation by defining compute resources such as processors themselves by lightweight threads that are executed in parallel together with the application threads by the X10 run-time system. Thus, the state changes of each hardware resource may be simulated including temperature, aging, and other useful monitor functionality to provide a first high-level programming test-bed for invasive computing. Copyright © 2011 ACM.



FAU-Autoren / FAU-Herausgeber

Hannig, Frank PD Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Roloff, Sascha
Sonderforschungsbereich/Transregio 89 Invasives Rechnen
Teich, Jürgen Prof. Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


Autor(en) der externen Einrichtung(en)
Karlsruhe Institute of Technology (KIT)


Zitierweisen

APA:
Hannig, F., Roloff, S., Snelting, G., Teich, J., & Zwinkau, A. (2011). Resource-Aware Programming and Simulation of MPSoC Architectures through Extension of X10. In Proceedings of the 14th International Workshop on Software and Compilers for Embedded Systems (pp. 48-55). St. Goar, DE: New York, NY, USA: ACM.

MLA:
Hannig, Frank, et al. "Resource-Aware Programming and Simulation of MPSoC Architectures through Extension of X10." Proceedings of the 14th International Workshop on Software and Compilers for Embedded Systems, St. Goar New York, NY, USA: ACM, 2011. 48-55.

BibTeX: 

Zuletzt aktualisiert 2018-09-08 um 22:53