Zeiser T, Hager G, Wellein G (2009)
Publication Language: English
Publication Type: Conference contribution
Publication year: 2009
Publisher: ipdps
Edited Volumes: IPDPS 2009 - Proceedings of the 2009 IEEE International Parallel and Distributed Processing Symposium
City/Town: IEEE Computer Society
Pages Range: 1-8
Conference Proceedings Title: Proceedings of the IEEE International Symposium on Parallel&Distributed Processing 2009
Event location: Roma
ISBN: 978-1-4244-3751-1
DOI: 10.1109/IPDPS.2009.5161089
Classic vector systems have all but vanished from recent TOP500 lists. Looking at the newly introduced NEC SX-9 series, we benchmark its memory subsystem using the low level vector triad and employ an advanced lattice Boltzmann flow solver kernel to demonstrate that classic vectors still combine excellent performance with a well-established optimization approach. Results for commodity x86-based systems are provided for reference. © 2009 IEEE.
APA:
Zeiser, T., Hager, G., & Wellein, G. (2009). The world's fastest CPU and SMP node: Some performance results from the NEC SX-9. In Proceedings of the IEEE International Symposium on Parallel&Distributed Processing 2009 (pp. 1-8). Roma: IEEE Computer Society: ipdps.
MLA:
Zeiser, Thomas, Georg Hager, and Gerhard Wellein. "The world's fastest CPU and SMP node: Some performance results from the NEC SX-9." Proceedings of the 23rd IEEE International Parallel and Distributed Processing Symposium (IPDPS), Roma IEEE Computer Society: ipdps, 2009. 1-8.
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