Controller Synthesis for Mapping Partitioned Programs on Array Architectures

Dutta H, Hannig F, Teich J (2006)

Publication Type: Conference contribution

Publication year: 2006

Journal

Lecture Notes in Computer Science Springer Verlag

Publisher: Springer-verlag

Edited Volumes: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Series: Lecture Notes in Computer Science (LNCS)

City/Town: Berlin, Heidelberg, New York

Book Volume: 3894

Pages Range: 176-191

Conference Proceedings Title: Proceedings of the 19th International Conference on Architecture of Computing Systems

Event location: Frankfurt am Main DE

ISBN: 3-540-32765-7

DOI: 10.1007/11682127_13

Abstract

Processor arrays can be used as accelerators for a plenty of dataflow-dominant applications. Innately these applications have almost no control flow, but the application of sophisticated partitioning and scheduling techniques in order to handle large scale problems and to balance local memory requirements with I/O-bandwidth has the disadvantage of a more complex control flow. Thus, efficient control path synthesis is one of the greatest challenges when compiling algorithms onto processor arrays. This paper presents an efficient methodology for the automated control path synthesis for the mapping of partitioned algorithms onto processor arrays. The major advantages observed in the presented methodology are seen in, (a) control generation for different partitioning techniques and arbitrary parallelepiped tiles, (b) combined use of a global and a local control strategy in order to reduce the control overhead, (c) up to 90 percent reduction in control path area and resources compared to existing approaches. © Springer-Verlag Berlin Heidelberg 2006.

Authors with CRIS profile

Hritam Dutta Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design) Frank Hannig Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design) Jürgen Teich Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Related research project(s)

Co-Design of Massively Parallel Embedded Processor Architectures (CoMap) Jan. 1, 2005 - Dec. 31, 2011 Dedizierte massiv parallele Systeme (PARO) Jan. 3, 2000 - Jan. 3, 2003

How to cite

APA:

Dutta, H., Hannig, F., & Teich, J. (2006). Controller Synthesis for Mapping Partitioned Programs on Array Architectures. In Proceedings of the 19th International Conference on Architecture of Computing Systems (pp. 176-191). Frankfurt am Main, DE: Berlin, Heidelberg, New York: Springer-verlag.

MLA:

Dutta, Hritam, Frank Hannig, and Jürgen Teich. "Controller Synthesis for Mapping Partitioned Programs on Array Architectures." Proceedings of the 19th International Conference on Architecture of Computing Systems (ARCS), Frankfurt am Main Berlin, Heidelberg, New York: Springer-verlag, 2006. 176-191.

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