A New Approach for Reconfigurable Massively Parallel Computers

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Details zur Publikation

Autorinnen und Autoren: Ahmadinia A, Bobda C, Danne K, Teich J
Verlag: Institute of Electrical and Electronics Engineers Inc.
Jahr der Veröffentlichung: 2003
Titel der Reihe: A New Approach for Reconfigurable Massively Parallel Computers
Tagungsband: Proceedings of the IEEE International Conference on Field-Programmable Technology
Seitenbereich: 391-394
ISBN: 9780780383203


Abstract


We present a new approach for reconfigurable massively parallel computers. The approach uses FPGA as reconfigurable device to build parallel computers which can adapt their physical topology to match the virtual topology used to model the parallel computation paradigm of a given application. We use a case study in which a virtual ring topology is first simulated on a tree topology and then directly implemented in an FPGA configuration. Preliminary results show that we can increase the performance of the parallel computers which make use of message passing interface by afactor of up to 20 % if a reconfigurable topology approach is used.



FAU-Autorinnen und Autoren / FAU-Herausgeberinnen und Herausgeber

Teich, Jürgen Prof. Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


Einrichtungen weiterer Autorinnen und Autoren

Universität Paderborn


Zitierweisen

APA:
Ahmadinia, A., Bobda, C., Danne, K., & Teich, J. (2003). A New Approach for Reconfigurable Massively Parallel Computers. In Proceedings of the IEEE International Conference on Field-Programmable Technology (pp. 391-394). Tokyo, JP: Institute of Electrical and Electronics Engineers Inc..

MLA:
Ahmadinia, Ali, et al. "A New Approach for Reconfigurable Massively Parallel Computers." Proceedings of the IEEE International Conference on Field-Programmable Technology,, Tokyo Institute of Electrical and Electronics Engineers Inc., 2003. 391-394.

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