FPGA Core Watermarking Based on Power Signature Analysis

Ziener D, Teich J (2006)


Publication Type: Conference contribution

Publication year: 2006

Edited Volumes: Proceedings - 2006 IEEE International Conference on Field Programmable Technology, FPT 2006

Pages Range: 205-212

Conference Proceedings Title: Proceedings of IEEE International Conference on Field-Programmable Technology

Event location: Bangkok TH

DOI: 10.1109/FPT.2006.270313

Abstract

In this paper we introduce a new method to watermark FPGA cores where the signature (watermark) is detected at the power supply pins of the FPGA. This is the first watermarking method, where the signature is extracted in this way. We are able to sign cores at the netlist as well as the bitfile level, so a wide spectrum of cores can be protected. The power watermarking method works with all types of FPGAs, but with Xilinx FPGAs, we can integrate the watermarking algorithms and the signature into the functionality of the watermarked core. So it is very hard to remove the watermark without destroying the core. We introduce a detection algorithm which can decode the signature from a voltage trace with high probability. Additionally, a second algorithm is introduced which improves the detection probability in case of considerable noise sources. Using this algorithm, it is possible to decode the signature even if other cores operate on the same device at the same time. © 2006 IEEE.

Authors with CRIS profile

Related research project(s)

How to cite

APA:

Ziener, D., & Teich, J. (2006). FPGA Core Watermarking Based on Power Signature Analysis. In Proceedings of IEEE International Conference on Field-Programmable Technology (pp. 205-212). Bangkok, TH.

MLA:

Ziener, Daniel, and Jürgen Teich. "FPGA Core Watermarking Based on Power Signature Analysis." Proceedings of the IEEE International Conference on Field-Programmable Technology (FPT ), Bangkok 2006. 205-212.

BibTeX: Download