A Fast and Accurate Fault Tree Analysis Based on Stochastic Logic Implemented on Field-Programmable Gate Arrays

Aliee H, Zarandi HR (2012)

Publication Type: Journal article

Publication year: 2012

Journal

IEEE Transactions on Reliability Institute of Electrical and Electronics Engineers (IEEE)

Publisher: Institute of Electrical and Electronics Engineers (IEEE)

Book Volume: 62

Pages Range: 13-22

Journal Issue: 99

DOI: 10.1109/TR.2012.2221012

Authors with CRIS profile

Hananeh Aliee Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Involved external institutions

Amirkabir University of Technology (AUT) / دانشگاه صنعتی امیرکبیر IR Iran, Islamic Republic of (IR)

How to cite

APA:

Aliee, H., & Zarandi, H.R. (2012). A Fast and Accurate Fault Tree Analysis Based on Stochastic Logic Implemented on Field-Programmable Gate Arrays. IEEE Transactions on Reliability, 62(99), 13-22. https://dx.doi.org/10.1109/TR.2012.2221012

MLA:

Aliee, Hananeh, and Hamid Reza Zarandi. "A Fast and Accurate Fault Tree Analysis Based on Stochastic Logic Implemented on Field-Programmable Gate Arrays." IEEE Transactions on Reliability 62.99 (2012): 13-22.

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