Dual-Inductive Snubber Circuit Design for Three-Level Inverter

Al-Nasseir J, Weindl C, Herold G (2007)


Publication Type: Conference contribution

Publication year: 2007

Edited Volumes: 2007 European Conference on Power Electronics and Applications, EPE

Pages Range: Paper 151

Conference Proceedings Title: EPE 2007 - 12th European Conference on Power Electronics and Applications

Event location: Aalborg DK

URI: http://www.eev.eei.uni-erlangen.de/Download/proceedings/2007-Aalborg-Nass-Wei-Hd.pdf

DOI: 10.1109/EPE.2007.4417284

Abstract

A new circuit design for the protection of e.g. multi level converters will be presented in this paper. The so-called 'dual-inductive snubber circuit design for three-level converter' will optimize the number of the total snubber circuit elements and the behavior RCD/ RLD snubber circuit especially in the direction of over-voltage and over-current, and will be suitable to be used in high power inverters as well as FACTS systems due to its features. The new design comprises most of the advantages of the common snubber circuit as a low number of components, improved efficiency and power semiconductor losses due to the low number of snubber elements, reduced over-voltage across the semiconductor devices and no balancing problems. The presented snubber circuit has been analyzed, compared, and confronted to the output of a standardized three level converter system to verify its advantages.

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APA:

Al-Nasseir, J., Weindl, C., & Herold, G. (2007). Dual-Inductive Snubber Circuit Design for Three-Level Inverter. In EPE 2007 - 12th European Conference on Power Electronics and Applications (pp. Paper 151). Aalborg, DK.

MLA:

Al-Nasseir, Jamal, Christian Weindl, and Gerhard Herold. "Dual-Inductive Snubber Circuit Design for Three-Level Inverter." Proceedings of the EPE 2007 - 12th European Conference on Power Electronics and Applications, Aalborg 2007. Paper 151.

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