A Novel NoC-Architecture for Fault Tolerance and Power Saving

Beitrag bei einer Tagung


Details zur Publikation

Autor(en): Heißwolf J, Friederich S, Masing L, Weichslgartner A, Zaib A, Stein C, Duden M, Teich J, Herkersdorf A, Becker J
Jahr der Veröffentlichung: 2016
Tagungsband: In Proceedings of the third International Workshop on Multi-Objective Many-Core Design (MOMAC) in conjunction with International Conference on Architecture of Computing Systems (ARCS
Seitenbereich: 8-9


FAU-Autoren / FAU-Herausgeber

Teich, Jürgen Prof. Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Weichslgartner, Andreas
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


Autor(en) der externen Einrichtung(en)
Karlsruhe Institute of Technology (KIT)
Technische Universität München (TUM)


Zitierweisen

APA:
Heißwolf, J., Friederich, S., Masing, L., Weichslgartner, A., Zaib, A., Stein, C.,... Becker, J. (2016). A Novel NoC-Architecture for Fault Tolerance and Power Saving. In In Proceedings of the third International Workshop on Multi-Objective Many-Core Design (MOMAC) in conjunction with International Conference on Architecture of Computing Systems (ARCS (pp. 8-9). Nuremberg, DE.

MLA:
Heißwolf, Jan, et al. "A Novel NoC-Architecture for Fault Tolerance and Power Saving." Proceedings of the Third International Workshop on Multi-Objective Many-Core Design (MOMAC) in conjunction with International Conference on Architecture of Computing Systems (ARCS, Nuremberg 2016. 8-9.

BibTeX: 

Zuletzt aktualisiert 2018-06-08 um 22:33