Timing Analysis of a Heterogeneous Architecture with Massively Parallel Processor Arrays

Gangadharan D, Tanase AP, Hannig F, Teich J (2014)

Publication Type: Conference contribution

Publication year: 2014

Event location: Dresden, Germany

URI: https://ecsi.org/resource/workshop/2014/3PMCES/DATE/paper/timing-analysis-heterogeneous-architecture-massively-parallel-processor-arrays

Authors with CRIS profile

Deepak Gangadharan Sonderforschungsbereich/Transregio 89 Invasives Rechnen Alexandru-Petru Tanase Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design) Frank Hannig Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design) Jürgen Teich Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

How to cite

APA:

Gangadharan, D., Tanase, A.-P., Hannig, F., & Teich, J. (2014). Timing Analysis of a Heterogeneous Architecture with Massively Parallel Processor Arrays. In Proceedings of the DATE Friday Workshop on Performance, Power and Predictability of Many-Core Embedded Systems (3PMCES). Dresden, Germany.

MLA:

Gangadharan, Deepak, et al. "Timing Analysis of a Heterogeneous Architecture with Massively Parallel Processor Arrays." Proceedings of the DATE Friday Workshop on Performance, Power and Predictability of Many-Core Embedded Systems (3PMCES), Dresden, Germany 2014.

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