Synthesis of FPGA Implementations from Loop Algorithms
Teich J, Bednara M (2001)
Publication Type: Conference contribution
Publication year: 2001
Pages Range: 1-7
Conference Proceedings Title: Proc. of the First International Conference on Engineering of Reconfigurable Systems and Algorithms
Event location: Las Vegas, Nevada
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APA:
Teich, J., & Bednara, M. (2001). Synthesis of FPGA Implementations from Loop Algorithms. In Proc. of the First International Conference on Engineering of Reconfigurable Systems and Algorithms (pp. 1-7). Las Vegas, Nevada, US.
MLA:
Teich, Jürgen, and Marcus Bednara. "Synthesis of FPGA Implementations from Loop Algorithms." Proceedings of the First International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA01),, Las Vegas, Nevada 2001. 1-7.
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