Automatic System-Level Synthesis: From Formal Application Models to Generic Bus-Based MPSoCs

Journal article


Publication Details

Author(s): Gladigau J, Gerstlauer A, Haubelt C, Streubühr M, Teich J
Title edited volumes: Transactions on HiPEAC
Journal: LNCS Transactions on High-Performance Embedded Architectures and Compilers
Publication year: 2011
Volume: 5
Journal issue: 4
Pages range: 1-22
ISSN: 1864-306X
eISSN: 1864-3078


FAU Authors / FAU Editors

Gladigau, Jens Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Haubelt, Christian Prof. Dr.-Ing.
Technische Fakultät
Streubühr, Martin
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Teich, Jürgen Prof. Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


External institutions with authors

University of Texas at Austin


How to cite

APA:
Gladigau, J., Gerstlauer, A., Haubelt, C., Streubühr, M., & Teich, J. (2011). Automatic System-Level Synthesis: From Formal Application Models to Generic Bus-Based MPSoCs. LNCS Transactions on High-Performance Embedded Architectures and Compilers, 5(4), 1-22.

MLA:
Gladigau, Jens, et al. "Automatic System-Level Synthesis: From Formal Application Models to Generic Bus-Based MPSoCs." LNCS Transactions on High-Performance Embedded Architectures and Compilers 5.4 (2011): 1-22.

BibTeX: 

Last updated on 2018-06-08 at 17:08