Kuzmin A, Fey D (2012)
Publication Type: Conference contribution
Publication year: 2012
Publisher: IARIA XPS Press
Edited Volumes: VALID 2012 - 4th International Conference on Advances in System Testing and Validation Lifecycle
City/Town: Lisbon, Portugal
Pages Range: 121-126
Conference Proceedings Title: VALID 2012, The Fourth International Conference on Advances in System Testing and Validation Lifecycle
Event location: Lisbon, Portugal
ISBN: 978-1-61208-233-2
URI: http://www.thinkmind.org/download.php?articleid=valid_2012_5_20_40029
Development, characterization and performance optimization of systems utilizing FPGAs with high-speed serial transceivers to implement optical links with 1 to 10 Gbps data rate is a complex task and it poses several challenges for design engineers. In this paper, an effective approach is presented designed to address these challenges based on the use of diagnostic features implemented in the transceivers and a soft-IP microcontroller system instantiated in the FPGA. The use of the soft-IP controller allows a single-point access to the control and diagnostic interfaces of all components forming the link. Combined with computational capabilities and a high-level programming language interpreter running on the soft-IP CPU inside the FPGA, it enables extensive optical link performance evaluation without relying on any additional test and measurement equipment and significantly shortens debugging and testing times. The implementation demonstrates the feasibility and effectiveness of the proposed approach to utilization of onchip diagnostic capabilities. Copyright © (2012) by International Academy, Research, and Industry Association (IARIA).
APA:
Kuzmin, A., & Fey, D. (2012). Optical Link Testing and Parameters Tuning with a Test System Fully Integrated into FPGA. In VALID 2012, The Fourth International Conference on Advances in System Testing and Validation Lifecycle (pp. 121-126). Lisbon, Portugal, PT: Lisbon, Portugal: IARIA XPS Press.
MLA:
Kuzmin, Anton, and Dietmar Fey. "Optical Link Testing and Parameters Tuning with a Test System Fully Integrated into FPGA." Proceedings of the The Fourth International Conference on Advances in System Testing and Validation Lifecycle, Lisbon, Portugal Lisbon, Portugal: IARIA XPS Press, 2012. 121-126.
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