Modeling and Verification of 4H-SiC TrenchMOS integration using Trench-First-Technology
Internally funded project
Start date : 01.09.2021
Project details
Short description
Penetration of silicon carbide (SiC) power devices has recently begun in a lot of advanced power electronics applications like automotive traction inverters. A trench gate MOSFET is a proven alternative power device to the conventional planar structure due to vertical channels, which allows primarily higher cell density without JFET region and the high cell integration ultimately saves chip costs. In general, a conventional manufacturing process involves the use of a lithography mask, in which the device can be patterned by defining accordingly resist structures and areas not covered by photoresist. Thus, it is crucial to achieve the high resolution and precise alignment for a mask-conforming structure that is significantly related to systemic limitations causing further high costs. Because of technical demands of mask-aligned lithography causing high costs and the given technological limitations of the lithography systems, a self-aligned manufacturing process is favorable in this case as ion implantation process for trench MOSFETs.
Scientific Abstract
A trench gate MOSFET is a promising alternative power device to the conventional VDMOS structure. In principle, the n+-source and p-well regions are implanted in the entire active area. Subsequently, trench structures are formed into this implanted area. Whereas maximal alignment accuracy can be obtained, a drawback of trench-last process is the difficulty to control the etching behavior of the implanted 4H-SiC, which is strongly dependent on the doping concentration Therefore, the manufacturing process, in which a formation of trenches is followed by self-aligned n+-source and p-well implantation (trench-first process), is proposed to form curved trench geometry by a reshape process for reducing high dielectric field concentration at trench bottom corners.
