Worst-Case Analysis of Digital Control Loops with Uncertain Input/Output Timing

Article in Edited Volumes
(Original article)


Publication Details

Author(s): Gaukler M, Ulbrich P
Title edited volumes: Proceedings of the 6th International Workshop on Applied Verification of Continuous and Hybrid Systems (ARCH '19)
Publication year: 2019
Title of series: EPiC Series in Computing
Conference Proceedings Title: Proceedings of the 6th International Workshop on Applied Verification of Continuous and Hybrid Systems (ARCH '16)
ISSN: 2398-7340
Language: English


Abstract

Benchmark Proposal: The implementation of digital control systems in complex multi-core or distributed real-time systems results in non-deterministic Input/Output timing. Such timing deviations typically lead to degraded performance or even instability, which in turn may jeopardize safety goals. We present the problem of proving worst-case guarantees for given Input/Output timing bounds as a benchmark for the verification of hybrid dynamical systems.


FAU Authors / FAU Editors

Gaukler, Maximilian
Lehrstuhl für Regelungstechnik
Ulbrich, Peter Dr.-Ing.
Lehrstuhl für Informatik 4 (Verteilte Systeme und Betriebssysteme)


How to cite

APA:
Gaukler, M., & Ulbrich, P. (2019). Worst-Case Analysis of Digital Control Loops with Uncertain Input/Output Timing. In Proceedings of the 6th International Workshop on Applied Verification of Continuous and Hybrid Systems (ARCH '19)..

MLA:
Gaukler, Maximilian, and Peter Ulbrich. "Worst-Case Analysis of Digital Control Loops with Uncertain Input/Output Timing." Proceedings of the 6th International Workshop on Applied Verification of Continuous and Hybrid Systems (ARCH '19). 2019.

BibTeX: 

Last updated on 2019-17-06 at 09:26