Programmable HSA Accelerators for Zynq UltraScale+ MPSoC Systems

Bauer W, Holzinger P, Reichenbach M, Vaas S, Hartke P, Fey D (2019)

Publication Type: Conference contribution

Publication year: 2019

Publisher: Springer International Publishing

City/Town: Cham

Pages Range: 733-744

Conference Proceedings Title: Euro-Par 2018: Parallel Processing Workshops

ISBN: 978-3-030-10549-5

DOI: 10.1007/978-3-030-10549-5_57

Abstract

Modern algorithms for virtual reality, machine learning or big data find its way into more and more application fields and result in stricter power per watt requirements. This challenges traditional homogeneous computing concepts and drives the development of new, heterogeneous architectures. One idea to attain a balance of high data throughput and flexibility are GPU-like soft-core processors combined with general purpose CPUs as hosts. However, the approaches proposed in recent years are still not sufficient regarding their integration in a shared hardware environment and unified software stack. The approach of the HSA Foundation provides a complete communication definition for heterogeneous systems but lacks FPGA accelerator support. Our work presents a methodology making soft-core processors HSA compliant within MPSoC systems. This enables high level software programming and therefore eases the accessibility of soft-core FPGA accelerators. Furthermore, the integration effort is kept low by fully utilizing the HSA Foundation standards and toolchains.

Authors with CRIS profile

Involved external institutions

Xilinx United States (USA) (US)

How to cite

APA:

Bauer, W., Holzinger, P., Reichenbach, M., Vaas, S., Hartke, P., & Fey, D. (2019). Programmable HSA Accelerators for Zynq UltraScale+ MPSoC Systems. In Mencagli G, B. Heras D, Cardellini V, Casalicchio E, Jeannot E, Wolf F, Salis A, Schifanella C, Manumachu RR, Ricci L, Beccuti M, Antonelli L, Garcia Sanchez JD, Scott SL (Eds.), Euro-Par 2018: Parallel Processing Workshops (pp. 733-744). Cham: Springer International Publishing.

MLA:

Bauer, Wolfgang, et al. "Programmable HSA Accelerators for Zynq UltraScale+ MPSoC Systems." Proceedings of the Euro-Par 2018: Parallel Processing Workshops - Euro-Par 2018 International Workshops Ed. Mencagli G, B. Heras D, Cardellini V, Casalicchio E, Jeannot E, Wolf F, Salis A, Schifanella C, Manumachu RR, Ricci L, Beccuti M, Antonelli L, Garcia Sanchez JD, Scott SL, Cham: Springer International Publishing, 2019. 733-744.

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