ReProVide: Towards Utilizing Heterogeneous Partially Reconfigurable Architectures for Near-Memory Data Processing

Beitrag bei einer Tagung
(Konferenzbeitrag)


Details zur Publikation

Autorinnen und Autoren: Becher A, Herrmann A, Wildermann S, Teich J
Herausgeber: Gesellschaft für Informatik, Bonn
Titel Sammelwerk: BTW 2019 – Workshopband
Verlag: Gesellschaft für Informatik
Verlagsort: Bonn
Jahr der Veröffentlichung: 2019
Tagungsband: Proceedings of the 1st Workshop on Novel Data Management Ideas on Heterogeneous (Co-)Processors (NoDMC)
Seitenbereich: 51-70
ISSN: 1617-546
Sprache: Englisch


Abstract

Reconfigurable hardware such as Field-programmable Gate Arrays (FPGAs) is widely used for data processing in databases. Most of the related work focuses on
accelerating one or a small set of specific operations like sort, join,
regular expression matching. A drawback of such approaches is often the
assumed static accelerator hardware architecture: Rather than adapting
the hardware to fit the query, the query plan has to be adapted to fit
the hardware. Moreover, operators or data types that are not supported by the accelerator have to be processed in software. As a remedy, approaches for exploiting the
dynamic partial reconfigurability of FPGAs have been proposed that are
able to adapt the datapath at runtime. However, on modern FPGAs, this introduces new challenges due to the heterogeneity of the available resources. In addition, not only the execution resources may be heterogeneous but also the memory resources.


This work focuses on the architectural aspects
of database (co-)processing on heterogeneous FPGA-based PSoC
(programmable System-on-Chip) architectures including processors,
specialized hardware components, multiple memory types and dynamically
partially reconfigurable areas. We present an approach to support such (co-)processing called ReProVide. In particular, we introduce a model to
formalize the challenging task of operator placement and buffer
allocation onto such heterogeneous hardware and describe the
difficulties of finding good placements. Furthermore, a detailed insight into different
memory types and their peculiarities is given in order to use the
strength of heterogeneous memory architectures. Here, we also highlight the implications of heterogeneous memories for the problem of query placement.


FAU-Autorinnen und Autoren / FAU-Herausgeberinnen und Herausgeber

Becher, Andreas
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Herrmann, Achim
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Teich, Jürgen Prof. Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Wildermann, Stefan Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


Zitierweisen

APA:
Becher, A., Herrmann, A., Wildermann, S., & Teich, J. (2019). ReProVide: Towards Utilizing Heterogeneous Partially Reconfigurable Architectures for Near-Memory Data Processing. In Gesellschaft für Informatik, Bonn (Eds.), Proceedings of the 1st Workshop on Novel Data Management Ideas on Heterogeneous (Co-)Processors (NoDMC) (pp. 51-70). Universität Rostock, DE: Bonn: Gesellschaft für Informatik.

MLA:
Becher, Andreas, et al. "ReProVide: Towards Utilizing Heterogeneous Partially Reconfigurable Architectures for Near-Memory Data Processing." Proceedings of the 1st Workshop on Novel Data Management Ideas on Heterogeneous (Co-)Processors (NoDMC) at 18. Fachtagung für "Datenbanksysteme für Business, Technologie und Web", Universität Rostock Ed. Gesellschaft für Informatik, Bonn, Bonn: Gesellschaft für Informatik, 2019. 51-70.

BibTeX: 

Zuletzt aktualisiert 2019-07-05 um 16:53