Configuration Tempering of BRAM-based AES Implementations on FPGAs

Conference contribution


Publication Details

Author(s): Ziener D, Pirkl J, Teich J
Publication year: 2018
Conference Proceedings Title: Proceedings of 2018 International Conference on Reconfigurable Computing and FPGAs


FAU Authors / FAU Editors

Pirkl, Jutta
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Teich, Jürgen Prof. Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


External institutions with authors

University of Twente


How to cite

APA:
Ziener, D., Pirkl, J., & Teich, J. (2018). Configuration Tempering of BRAM-based AES Implementations on FPGAs. In Proceedings of 2018 International Conference on Reconfigurable Computing and FPGAs. Cancun, MX.

MLA:
Ziener, Daniel, Jutta Pirkl, and Jürgen Teich. "Configuration Tempering of BRAM-based AES Implementations on FPGAs." Proceedings of the 2018 International Conference on Reconfigurable Computing and FPGAs, Cancun 2018.

BibTeX: 

Last updated on 2018-24-10 at 08:38