A 60 GHz 30.5% PAE Differential Stacked PA with Second Harmonic Control in 45 nm PD-SOI CMOS

Conference contribution
(Conference Contribution)


Publication Details

Author(s): Ciocoveanu R, Weigel R, Hagelauer A, Issakov V
Publication year: 2019
Language: English


Abstract

This paper presents a 60GHz highly efficient single-stage differential stacked Class AB power amplifier (PA) with second harmonic control. The circuit has been realized in a 45 nm PD-SOI CMOS technology. Measurement results show that the power amplifier achieves a maximum output power (Pmax) of 15.3dBm with a competitive maximum power-added efficiency (PAEmax) of 30.5% at 60 GHz. The output-referred 1-dB compression point (OP1dB) is 9.5 dBm. Furthermore, the circuit draws 40mA from a 1.8V supply and the chip core size is 0.36mm x 0.35 mm.


FAU Authors / FAU Editors

Ciocoveanu, Radu
Lehrstuhl für Technische Elektronik
Hagelauer, Amelie Dr.-Ing.
Lehrstuhl für Technische Elektronik
Weigel, Robert Prof. Dr.-Ing.
Lehrstuhl für Technische Elektronik


External institutions with authors

Infineon Technologies AG


How to cite

APA:
Ciocoveanu, R., Weigel, R., Hagelauer, A., & Issakov, V. (2019). A 60 GHz 30.5% PAE Differential Stacked PA with Second Harmonic Control in 45 nm PD-SOI CMOS. In Proceedings of the IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems. Orlando, FL, US.

MLA:
Ciocoveanu, Radu, et al. "A 60 GHz 30.5% PAE Differential Stacked PA with Second Harmonic Control in 45 nm PD-SOI CMOS." Proceedings of the IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, Orlando, FL 2019.

BibTeX: 

Last updated on 2019-23-07 at 07:36