A Low Insertion-Loss 10-110 GHz Digitally Tunable SPST Switch in 22 nm FD-SOI CMOS

Ciocoveanu R, Weigel R, Hagelauer AM, Issakov V (2018)

Publication Language: English

Publication Type: Conference contribution, Conference Contribution

Publication year: 2018

Conference Proceedings Title: A Low Insertion-Loss 10-110 GHz Digitally Tunable SPST Switch in 22 nm FD-SOI CMOS

Event location: San Diego, California, USA US

DOI: 10.1109/bcicts.2018.8550908

Abstract

This paper presents a wideband digitally tunable SPST switch based on the travelling-wave concept that has been realized in a 22 nm FD-SOI CMOS technology. The digital control for return loss is performed through mutual inductance switching. Small-signal measurement results show that the proposed SPST switch achieves a bandwidth of 10-110 GHz, with an insertion loss of 1.2 dB at 60 GHz and a 24 dB isolation at 60 GHz, whereas large-signal measurements show a 1-dB compression point of +7 dBm at 24 GHz. Furthermore, the 3 digital control bits allow tuning return loss center frequency by approximately 7 GHz. The chip core size is 0.12 mm x 0.15 mm.

Authors with CRIS profile

Radu Ciocoveanu Lehrstuhl für Technische Elektronik Robert Weigel Lehrstuhl für Technische Elektronik Amelie Marietta Hagelauer Lehrstuhl für Technische Elektronik

Involved external institutions

Infineon Technologies AG DE Germany (DE)

How to cite

APA:

Ciocoveanu, R., Weigel, R., Hagelauer, A.M., & Issakov, V. (2018). A Low Insertion-Loss 10-110 GHz Digitally Tunable SPST Switch in 22 nm FD-SOI CMOS. In A Low Insertion-Loss 10-110 GHz Digitally Tunable SPST Switch in 22 nm FD-SOI CMOS. San Diego, California, USA, US.

MLA:

Ciocoveanu, Radu, et al. "A Low Insertion-Loss 10-110 GHz Digitally Tunable SPST Switch in 22 nm FD-SOI CMOS." Proceedings of the 2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), San Diego, California, USA 2018.

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