Multi-Level Memristive Voltage Divider: Programming Scheme Trade-offs
Lieske T, Biglari M, Fey D (2018)
Publication Language: English
Publication Type: Conference contribution, Original article
Publication year: 2018
Publisher: ACM
City/Town: New York, NY, USA
Pages Range: 259-268
Conference Proceedings Title: Proceedings of the International Symposium on Memory Systems
Event location: Alexandria, Virginia
ISBN: 978-1-4503-6475-1
URI: http://doi.acm.org/10.1145/3240302.3240430
Authors with CRIS profile
Tobias Lieske
Lehrstuhl für Informatik 3 (Rechnerarchitektur)
Mehrdad Biglari
Lehrstuhl für Informatik 3 (Rechnerarchitektur)
Dietmar Fey
Lehrstuhl für Informatik 3 (Rechnerarchitektur)
How to cite
APA:
Lieske, T., Biglari, M., & Fey, D. (2018). Multi-Level Memristive Voltage Divider: Programming Scheme Trade-offs. In Proceedings of the International Symposium on Memory Systems (pp. 259-268). Alexandria, Virginia, US: New York, NY, USA: ACM.
MLA:
Lieske, Tobias, Mehrdad Biglari, and Dietmar Fey. "Multi-Level Memristive Voltage Divider: Programming Scheme Trade-offs." Proceedings of the International Symposium on Memory Systems (MEMSYS), Alexandria, Virginia New York, NY, USA: ACM, 2018. 259-268.
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