Bias-switched Down-Conversion Mixer for Flicker Noise Reduction in 28-nm CMOS

Ciocoveanu R, Weigel R, Hagelauer AM, Issakov V (2018)


Publication Language: English

Publication Type: Conference contribution, Conference Contribution

Publication year: 2018

City/Town: IEEE

Conference Proceedings Title: Texas Symposium on Wireless and Microwave Circuits and Systems

Event location: Waco, Texas US

DOI: 10.1109/wmcas.2018.8400634

Abstract

This paper presents a modified Gilbert-cell mixer employing a novel biasing-scheme used to reduce the high Noise Figure, due to inherently high 1/f noise of MOS transistors. Switching the transistor from strong inversion to accumulation interferes with the self-correlation of the physical noisy process, which leads to a reduction in flicker noise. To illustrate this improvement, a comparison with a conventionally biased mixer is carried. Post-layout simulation results show that this mixer achieves a voltage conversion gain of 2.2 dB, a 1 dB compression point of 3 dBm and a 5 dB reduction in noise figure at 50 kHz, while it draws a current of 13 mA from a single 0.9 V supply. The occupied chip area is 0.5x0.94 mm². According to author’s knowledge this is the first time that bias switching technique is applied to a mixer at mm-wave frequencies.

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How to cite

APA:

Ciocoveanu, R., Weigel, R., Hagelauer, A.M., & Issakov, V. (2018). Bias-switched Down-Conversion Mixer for Flicker Noise Reduction in 28-nm CMOS. In Texas Symposium on Wireless and Microwave Circuits and Systems. Waco, Texas, US: IEEE.

MLA:

Ciocoveanu, Radu, et al. "Bias-switched Down-Conversion Mixer for Flicker Noise Reduction in 28-nm CMOS." Proceedings of the Texas Symposium on Wireless and Microwave Circuits and Systems, Waco, Texas IEEE, 2018.

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