Quantifying performance bottlenecks of stencil computations using the Execution-Cache-Memory model

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Details zur Publikation

Autorinnen und Autoren: Eitzinger J, Hager G, Wellein G, Stengel H
Verlag: Association for Computing Machinery
Jahr der Veröffentlichung: 2014
Seitenbereich: 1-10
ISBN: 9781450335591


Abstract


Stencil algorithms on regular lattices appear in many fields of computational science, and much effort has been put into optimized implementations. Such activities are usually not guided by performance models that provide estimates of expected speedup. Understanding the performance properties and bottlenecks by performance modeling enables a clear view on promising optimization opportunities. In this work we refine the recently developed Execution-Cache-Memory (ECM) model and use it to quantify the performance bottlenecks of stencil algorithms on a contemporary Intel processor. This includes applying the model to arrive at single-core performance and scalability predictions for typical "corner case" stencil loop kernels. Guided by the ECM model we accurately quantify the significance of "layer conditions," which are required to estimate the data traffic through the memory hierarchy, and study the impact of typical optimization approaches such as spatial blocking, strength reduction, and temporal blocking for their expected benefits. We also compare the ECM model to the widely known Roofline model.



FAU-Autorinnen und Autoren / FAU-Herausgeberinnen und Herausgeber

Eitzinger, Jan Dr.
Regionales Rechenzentrum Erlangen (RRZE)
Hager, Georg Dr.
Regionales Rechenzentrum Erlangen (RRZE)
Stengel, Holger
Hauptbibliothek
Wellein, Gerhard Prof. Dr.
Professur für Höchstleistungsrechnen


Zitierweisen

APA:
Eitzinger, J., Hager, G., Wellein, G., & Stengel, H. (2014). Quantifying performance bottlenecks of stencil computations using the Execution-Cache-Memory model. (pp. 1-10). Association for Computing Machinery.

MLA:
Eitzinger, Jan, et al. "Quantifying performance bottlenecks of stencil computations using the Execution-Cache-Memory model." Association for Computing Machinery, 2014. 1-10.

BibTeX: 

Zuletzt aktualisiert 2018-09-08 um 20:54