Efficient approximately-timed performance modeling for architectural exploration of MPSoCs

Conference contribution
(Conference Contribution)


Publication Details

Author(s): Streubühr M, Gladigau J, Haubelt C, Teich J
Publication year: 2009
Conference Proceedings Title: Forum on specification and Design Languages 2009
ISBN: 9782953050417


Abstract


In this paper, we propose an efficient modeling approach that permits simulation-based performance evaluation of MPSoCs at Electronic System Level (ESL). The approach is based on a SystemC simulation framework and allows for evaluating timing effects from resource contention when mapping applications to MPSoC platforms. The abstraction level used for modeling timing corresponds to approximately-timed transaction level models. This allows for an accurate performance modeling, including temporal effects from preemptive processor scheduling and bus arbitration. However, in contrast to standard SystemC TLM, application mapping and platform models are configurable and, thus, enable design space exploration at ESL. We use a Motion-JPEG decoder application to illustrate and assess the benefits of the proposed approach.



FAU Authors / FAU Editors

Gladigau, Jens Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Haubelt, Christian Prof. Dr.-Ing.
Technische Fakultät
Streubühr, Martin
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Teich, Jürgen Prof. Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


How to cite

APA:
Streubühr, M., Gladigau, J., Haubelt, C., & Teich, J. (2009). Efficient approximately-timed performance modeling for architectural exploration of MPSoCs. In Forum on specification and Design Languages 2009. Sophia Antipolis.

MLA:
Streubühr, Martin, et al. "Efficient approximately-timed performance modeling for architectural exploration of MPSoCs." Proceedings of the 2009 Forum on Specification and Design Languages, FDL 2009, Sophia Antipolis 2009.

BibTeX: 

Last updated on 2018-19-04 at 03:25