Modulo Scheduling of Symbolically Tiled Loops for Tightly Coupled Processor Arrays

Conference contribution


Publication Details

Author(s): Witterauf M, Tanase AP, Hannig F, Teich J
Publication year: 2016
Conference Proceedings Title: Proceedings of the 27th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP)
Language: English


FAU Authors / FAU Editors

Hannig, Frank Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Tanase, Alexandru-Petru Dr.-Ing.
Sonderforschungsbereich/Transregio 89 Invasives Rechnen
Teich, Jürgen Prof. Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Witterauf, Michael
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


How to cite

APA:
Witterauf, M., Tanase, A.-P., Hannig, F., & Teich, J. (2016). Modulo Scheduling of Symbolically Tiled Loops for Tightly Coupled Processor Arrays. In Proceedings of the 27th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP). London, GB.

MLA:
Witterauf, Michael, et al. "Modulo Scheduling of Symbolically Tiled Loops for Tightly Coupled Processor Arrays." Proceedings of the IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), London 2016.

BibTeX: 

Last updated on 2018-19-04 at 03:24