Symbolic Multi-Level Loop Mapping of Loop Programs for Massively Parallel Processor Arrays

Journal article
(Original article)


Publication Details

Author(s): Tanase AP, Witterauf M, Teich J, Hannig F
Journal: ACM Transactions on Embedded Computing Systems
Publication year: 2017
Volume: 17
Journal issue: 2
Pages range: 31:1-31:27
ISSN: 1539-9087


FAU Authors / FAU Editors

Hannig, Frank Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Tanase, Alexandru-Petru Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Teich, Jürgen Prof. Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Witterauf, Michael
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


How to cite

APA:
Tanase, A.-P., Witterauf, M., Teich, J., & Hannig, F. (2017). Symbolic Multi-Level Loop Mapping of Loop Programs for Massively Parallel Processor Arrays. ACM Transactions on Embedded Computing Systems, 17(2), 31:1-31:27. https://dx.doi.org/10.1145/3092952

MLA:
Tanase, Alexandru-Petru, et al. "Symbolic Multi-Level Loop Mapping of Loop Programs for Massively Parallel Processor Arrays." ACM Transactions on Embedded Computing Systems 17.2 (2017): 31:1-31:27.

BibTeX: 

Last updated on 2018-30-06 at 13:23