Massively Parallel Processor Architectures for Resource-aware Computing

Conference contribution


Publication Details

Author(s): Lari V, Tanase AP, Hannig F, Teich J
Publication year: 2014
Conference Proceedings Title: Proc. of the First Workshop on Resource Awareness and Adaptivity in Multi-Core Computing (Racing 2014)
Pages range: 1-7


FAU Authors / FAU Editors

Hannig, Frank Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Lari, Vahid
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Tanase, Alexandru-Petru Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Teich, Jürgen Prof. Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


How to cite

APA:
Lari, V., Tanase, A.-P., Hannig, F., & Teich, J. (2014). Massively Parallel Processor Architectures for Resource-aware Computing. In Proc. of the First Workshop on Resource Awareness and Adaptivity in Multi-Core Computing (Racing 2014) (pp. 1-7). Paderborn, DE.

MLA:
Lari, Vahid, et al. "Massively Parallel Processor Architectures for Resource-aware Computing." Proceedings of the First Workshop on Resource Awareness and Adaptivity in Multi-Core Computing (Racing ), Paderborn 2014. 1-7.

BibTeX: 

Last updated on 2018-19-04 at 02:53