Unifying Partitioning and Placement for SAT-based Exploration of Heterogeneous Reconfigurable SoCs

Conference contribution


Publication Details

Author(s): Wildermann S, Ziener D, Teich J
Title edited volumes: Proceedings - 21st International Conference on Field Programmable Logic and Applications, FPL 2011
Publisher: IEEE Press
Publishing place: New York, NY, USA
Publication year: 2011
Conference Proceedings Title: Proc. of the International Conference on Field Programmable Logic and Applications
Pages range: 429-434
ISBN: 978-1-4577-1484-9


Abstract


Heterogeneous reconfigurable SoCs provide more flexibility, maintainability, and re-usability than hardwired SoCs. Designing such systems is a complex task, since early decisions, as design partitioning, influence the subsequent design steps, such as placement of partially reconfigurable modules In this paper, we investigate a symbolic design space exploration (DSE) approach for this kind of SoCs, where we transform the problem of finding a feasible implementation to a Boolean satisfiability problem (SAT). We present three encoding variants which unify partitioning and placement to overcome the drawbacks of their separation. In particular, we will show that the runtime of DSE can be speeded up when we perform a preprocessing mechansim that identifies those partitionings which inevitably lead to infeasibility, and then incorporate this information into the symbolic encoding for calculating feasible placements. Our experiments show the effectiveness of our SAT-based approach and compare the presented encoding variants. © 2011 IEEE.



FAU Authors / FAU Editors

Teich, Jürgen Prof. Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Wildermann, Stefan Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Ziener, Daniel Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


How to cite

APA:
Wildermann, S., Ziener, D., & Teich, J. (2011). Unifying Partitioning and Placement for SAT-based Exploration of Heterogeneous Reconfigurable SoCs. In Proc. of the International Conference on Field Programmable Logic and Applications (pp. 429-434). Chania, Crete, GR: New York, NY, USA: IEEE Press.

MLA:
Wildermann, Stefan, Daniel Ziener, and Jürgen Teich. "Unifying Partitioning and Placement for SAT-based Exploration of Heterogeneous Reconfigurable SoCs." Proceedings of the International Conference on Field Programmable Logic and Applications (FPL'11), Chania, Crete New York, NY, USA: IEEE Press, 2011. 429-434.

BibTeX: 

Last updated on 2018-19-04 at 02:52