A Reconfigurable Memory Architecture for System Integration of Coarse-Grained Reconfigurable Arrays

Conference contribution


Publication Details

Author(s): Sousa É, Tanase AP, Hannig F, Teich J
Publication year: 2017


FAU Authors / FAU Editors

Hannig, Frank Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Tanase, Alexandru-Petru Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Teich, Jürgen Prof. Dr.-Ing.
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


How to cite

APA:
Sousa, É., Tanase, A.-P., Hannig, F., & Teich, J. (2017). A Reconfigurable Memory Architecture for System Integration of Coarse-Grained Reconfigurable Arrays. Cancun, Mexico, MX.

MLA:
Sousa, Éricles, et al. "A Reconfigurable Memory Architecture for System Integration of Coarse-Grained Reconfigurable Arrays." Proceedings of the International Conference on ReConFigurable Computing and FPGA's (ReConFig), Cancun, Mexico 2017.

BibTeX: 

Last updated on 2018-19-04 at 04:20