Leveraging shared caches for parallel temporal blocking of stencil codes on multicore processors and clusters

Beitrag in einer Fachzeitschrift


Details zur Publikation

Autor(en): Wittmann M, Hager G, Eitzinger J, Wellein G
Zeitschrift: Parallel Processing Letters
Verlag: World Scientific Publishing Co
Jahr der Veröffentlichung: 2010
Band: 20
Heftnummer: 4
Seitenbereich: 359-376
ISSN: 0129-6264


Abstract


Bandwidth-starved multicore chips have become ubiquitous. It is well known that the performance of stencil codes can be improved by temporal blocking, lessening the pressure on the memory interface. We introduce a new pipelined approach that makes explicit use of shared caches in multicore environments and minimizes synchronization and boundary overhead. Benchmark results are presented for three current x86-based microprocessors, showing clearly that our optimization works best on designs with high-speed shared caches and low memory bandwidth per core. We furthermore demonstrate that simple bandwidth-based performance models are inaccurate for this kind of algorithm and employ a more elaborate, synthetic modeling procedure. Finally we show that temporal blocking can be employed successfully in a hybrid shared/distributed-memory environment, albeit with limited benefit at strong scaling. © 2010 World Scientific Publishing Company.



FAU-Autoren / FAU-Herausgeber

Eitzinger, Jan Dr.
Regionales Rechenzentrum Erlangen (RRZE)
Hager, Georg Dr.
Regionales Rechenzentrum Erlangen (RRZE)
Wellein, Gerhard Prof. Dr.
Professur für Höchstleistungsrechnen
Wittmann, Markus
Regionales Rechenzentrum Erlangen (RRZE)


Zitierweisen

APA:
Wittmann, M., Hager, G., Eitzinger, J., & Wellein, G. (2010). Leveraging shared caches for parallel temporal blocking of stencil codes on multicore processors and clusters. Parallel Processing Letters, 20(4), 359-376. https://dx.doi.org/10.1142/S0129626410000296

MLA:
Wittmann, Markus, et al. "Leveraging shared caches for parallel temporal blocking of stencil codes on multicore processors and clusters." Parallel Processing Letters 20.4 (2010): 359-376.

BibTeX: 

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