SystemCoDesigner: Entwurfsraumexploration für eingebettete Systeme

Eigenmittelfinanziertes Projekt


Details zum Projekt

Projektleiter/in:
Prof. Dr.-Ing. Jürgen Teich

Projektbeteiligte:
Joachim Falk
Tobias Schwarzer
Hananeh Aliee
Faramarz Khosravi
Franz-Josef Streit
Peter Brand

Beteiligte FAU-Organisationseinheiten:
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Akronym: SystemCoDesigner
Projektstart: 01.04.2005


Abstract (fachliche Beschreibung):


In diesem Projekt werden neue Modelle und Methoden zur automatischen Entwurfsraumexploration für eingebettete Systeme auf der Systemebene untersucht. Das grundlegende Problem stellt die optimale Allokation von Ressourcen sowie die optimale Bindung von Prozessen auf diese Ressourcen dar. Zum Einsatz kommen hierbei moderne Mehrzieloptimierungsverfahren sowie symbolische Techniken. Weiterhin besteht eine Kopplung zur Systembeschreibungssprache SystemC.


Publikationen
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Schwarzer, T., Falk, J., Müller, S., Letras, M., Heidorn, C., Wildermann, S., & Teich, J. (2019). Compilation of Dataflow Applications for Multi-Cores using Adaptive Multi-Objective Optimization. ACM Transactions on Design Automation of Electronic Systems, 24(3). https://dx.doi.org/10.1145/3310249
Pourmohseni, B., Smirnov, F., Wildermann, S., & Teich, J. (2019). Isolation-Aware Timing Analysis and Design Space Exploration for Predictable and Composable Many-Core Systems. In Proceedings of the 31th Euromicro Conference on Real-Time Systems (ECRTS'19) (pp. (accepted)). Stuttgart, Germany.
Letras, M., Falk, J., Schwarzer, T., & Teich, J. (2019). On the Analytic Evaluation of Schedules via Max-Plus Algebra for DSE of Multi-Core Architectures. In Proceedings of the 22st International Workshop on Software and Compilers for Embedded Systems, SCOPES 2019, Sankt Goar, Germany (pp. 1-9). Sankt Goar, Germany, DE: ACM.
Smirnov, F., Pourmohseni, B., Glaß, M., & Teich, J. (2019). Variety-Aware Routing Encoding for Efficient Design Space Exploration of Automotive Communication Networks. In Proceedings of the 5th International Conference on Vehicle Technology and Intelligent Transport Systems (VEHITS). Heraklion, Kreta, GR.
Smirnov, F., Reimann, F., Teich, J., & Glaß, M. (2018). Automatic Optimization of the VLAN Partitioning in Automotive Communication Networks. ACM Transactions on Design Automation of Electronic Systems.
Streit, F.-J., Letras, M., Wildermann, S., Hackenberg, B., Falk, J., Becher, A., & Teich, J. (2018). Model-Based Design Automation of Hardware/Software Co-Designs for Xilinx Zynq PSoCs. In IEEE-Xplore digital library. Cancun, MX.
Letras, M., Falk, J., Wildermann, S., & Teich, J. (2017). Automatic Conversion of Simulink Models to SysteMoC Actor Networks. Sankt Goar, DE.
Streit, F.-J., Letras, M., Schid, M., Falk, J., Wildermann, S., & Teich, J. (2017). High-Level Synthesis for Hardware/Software Co-Design of Distributed Smart Camera Systems. Stanford, US: Association for Computing Machinery.
Falk, J., Haubelt, C., Teich, J., & Zebelein, C. (2017). SysteMoC: A Data-Flow Programming Language for Codesign. In Ha S, Teich J (Eds.), Handbook of Hardware/Software Codesign. (pp. 59 - 97). Dordrecht, The Netherlands: Springer.
Falk, J. (2015). A Clustering-Based MPSoC Design Flow for Data Flow-Oriented Applications (Dissertation).

Zuletzt aktualisiert 2019-10-07 um 14:39