Daniel Wust



Organisationseinheit


Lehrstuhl für Informatik 3 (Rechnerarchitektur)


Publikationen (Download BibTeX)


Wust, D., Fey, D., & Knödtel, J. (2018). A programmable ternary CPU using hybrid CMOS/memristor circuits. International Journal of Parallel, Emergent and Distributed Systems, 1--21. https://dx.doi.org/10.1080/17445760.2017.1422251
Wust, D., Söll, C., & Fey, D. (2017). A fast general purpose CPU utilizing signed-digit encoding and multi-bit memristors. In Proceedings of the HiPEAC Workshop on Memristor Technology, Design, Automation and Computing.
Wust, D., Biglari, M., Knödtel, J., Reichenbach, M., Söll, C., & Fey, D. (2017). Prototyping Memristors in Digital Systems with an FPGA-Based Testing Environment. In Power and Timing Modeling, Optimization and Simulation (PATMOS), 2017 27th International Symposium on (pp. 1-7). Thessaloniki, GR: IEEE.

Zuletzt aktualisiert 2017-09-12 um 01:01