Dr.-Ing. Frank Hannig

Thomson Researcher ID: G-5213-2014
Scopus Author ID: 6602533567



Organisation


Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


Awards / Honours


2015 : HiPEAC Paper Award: Execution-driven Parallel Simulation of PGAS Applications on Heterogeneous Tiled Architectures
2013 : Best Paper Award: Symbolic Parallelization of Loop Programs for Massively Parallel Processor Arrays
2012 : HiPEAC Paper Award: Power Management Strategies for Serial RapidIO Endpoints in FPGAs
2005 : Distinguished Paper: Defragmenting the Module Layout of a Partially Reconfigurable Device



Project lead

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HighPerMeshes: Domänenspezifische Programmierung und zielplattformbewusste Compiler-Infrastruktur für Algorithmen auf unstrukturierten Gittern
Dr.-Ing. Frank Hannig
(01/04/2017 - 31/03/2020)

(TRR 89: Invasive Computing):
TCPA_INT: Integration and Coupling of Tightly Coupled Processor Arrays (T01)
Dr.-Ing. Frank Hannig; Prof. Dr.-Ing. Jürgen Teich
(01/03/2017 - 29/02/2020)

INI.FAU: Parallelization and Resource Estimation of Algorithms for Heterogeneous FAS Architectures
Dr.-Ing. Frank Hannig; Prof. Dr.-Ing. Jürgen Teich
(01/05/2015 - 30/04/2018)

(TRR 89: Invasive Computing):
TRR 89: Simulative Design Space Exploration (C02)
Dr.-Ing. Frank Hannig
(01/07/2014 - 30/06/2018)

(SPP 1648: Software for Exascale Computing):
ExaStencils: ExaStencils - Advanced Stencil-Code Engineering
Dr.-Ing. Frank Hannig; Prof. Dr.-Ing. Jürgen Teich
(01/01/2013 - 31/12/2018)


Project member


(SPP 1648: Software for Exascale Computing):
ExaStencils: ExaStencils - Advanced Stencil-Code Engineering
Dr.-Ing. Frank Hannig; Prof. Dr.-Ing. Jürgen Teich
(01/01/2013 - 31/12/2018)

RTG 1773: Heterogeneous Image Systems
Prof. Dr. Marc Stamminger
(01/10/2012 - 31/03/2017)

(TRR 89: Invasive Computing):
TRR 89: Compilation and Code Generation for Invasive Programs (C03)
Prof. Dr.-Ing. Jürgen Teich
(01/07/2010 - 30/06/2018)

TRR 89: TRR 89: Invasive Computing
Prof. Dr.-Ing. Jürgen Teich
(01/07/2010 - 30/06/2018)


Publications (Download BibTeX)

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Fey, D., & Hannig, F. (2018). Special Issue on Heterogeneous Real-Time Image Processing. Journal of Real-Time Image Processing, 14(3), 513-515. https://dx.doi.org/10.1007/s11554-018-0763-2
Fickenscher, J., Hannig, F., Bouzouraa, M.E., & Teich, J. (2018). Embedded GPUs in Future Automated Cars. Dresden, DE.
Fickenscher, J., Hannig, F., Teich, J., & Bouzouraa, M.E. (2018). Base Algorithms of Environment Maps and Efficient Occupancy Grid Mapping on Embedded GPUs. (pp. 298-306). Funchal, Madeira, Portugal, PT: SCITEPRESS.
Fickenscher, J., Schlumberger, J., Hannig, F., Bouzouraa, M.E., & Teich, J. (2018). Cell-based Update Algorithm for Occupancy Grid Maps and new Hybrid Map for ADAS on Embedded GPUs. In IEEE (Eds.), (pp. 443-448). Dresden, Germany, DE: IEEE.
Kenter, T., Mahale, G., Alhaddad, S., Grynko, Y., Schmitt, C., Afzal, A.,... Plessl, C. (2018). OpenCL-based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes. In Proceedings of the 26th IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM). Boulder, CO, USA, US: ACM.
Mattauch, S., Lohmann, K., Hannig, F., Lohmann, D., & Teich, J. (2018). The Gender Gap in Computer Science --- A Bibliometric Analysis.
Qiao, B., Reiche, O., Hannig, F., & Teich, J. (2018). Automatic Kernel Fusion for Image Processing DSLs. In Proceedings of the 21th International Workshop on Software and Compilers for Embedded Systems. Sankt Goar, DE.
Reiche, O., Özkan, M.A., Hannig, F., Teich, J., & Schmid, M. (2018). Loop Parallelization Techniques for FPGA Accelerator Synthesis. Journal of Signal Processing Systems, 90(1), 3-27. https://dx.doi.org/10.1007/s11265-017-1229-7
Schmitt, C., Hannig, F., & Teich, J. (2018). A Target Platform Description Language for Parallel Code Generation. In Workshop Proceedings of the 31st GI/ITG International Conference on Architecture of Computing Systems (ARCS) (pp. 59-66). Braunschweig, DE: Berlin: VDE VERLAG GmbH.
Tanase, A.-P., Hannig, F., & Teich, J. (2018). Symbolic Parallelization of Nested Loop Programs. Springer.

Last updated on 2018-11-04 at 11:06