Prof. Dr.-Ing. Jürgen Teich


Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Awards / Honours

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2018 : Mitgliedschaft acatech - Deutsche Akademie der Technikwissenschaften
2016 : HiPEAC Paper Award: Formal Reliability Analysis of Switched Ethernet Automotive Networks under Transient Transmission Errors
2015 : Best Paper Award: Reliability of Space-Grade vs. COTS SRAM-based FPGA in N-Modular Redundancy
2015 : HiPEAC Paper Award: Execution-driven Parallel Simulation of PGAS Applications on Heterogeneous Tiled Architectures
2014 : Best Paper Award: Automatic Graph-based Success Tree Construction and Analysis

Project lead

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Prof. Dr.-Ing. Jürgen Teich
(01/08/2018 - 31/07/2020)

(DFG Priority Programme (SPP) 2037 - Scalable Data Management for Future Hardware):
ReProVide: Query Optimisation and Near-Data Processing on Reconfigurable SoCs for Big Data Analysis
Prof. Dr.-Ing. Klaus Meyer-Wegener; Dr.-Ing. Stefan Wildermann; Prof. Dr.-Ing. Jürgen Teich
(28/08/2017 - 31/08/2020)

AConFPGA: Approximate Computing on FPGAs
Prof. Dr.-Ing. Jürgen Teich

(TRR 89: Invasive Computing):
TCPA_INT: Integration and Coupling of Tightly Coupled Processor Arrays (T01)
PD Dr.-Ing. Frank Hannig; Prof. Dr.-Ing. Jürgen Teich
(01/03/2017 - 29/02/2020)

AdaptAC: Adaptive Approximate Computing in FPGA-basierter Bildverarbeitung
Prof. Dr.-Ing. Jürgen Teich
(24/08/2016 - 31/12/2017)

Project member

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TRR 89: DFG SFB/Transregio 89 "Invasive Computing"
Prof. Dr.-Ing. Jürgen Teich
(01/07/2010 - 30/06/2022)

Publications (Download BibTeX)

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Brand, M., Witterauf, M., Hannig, F., & Teich, J. (2019). Anytime Instructions for Programmable Accuracy Floating-Point Arithmetic. In ACM (Eds.), Proceedings of the ACM International Conference on Computing Frontiers 2019 (pp. 215 - 219). Alghero, Sardinia, IT.
Schwarzer, T., Falk, J., Müller, S., Letras, M., Heidorn, C., Wildermann, S., & Teich, J. (2019). Compilation of Dataflow Applications for Multi-Cores using Adaptive Multi-Objective Optimization. ACM Transactions on Design Automation of Electronic Systems, 24(3).
Teich, J., & Fummi, F. (2019). Conference Reports: Recap of DATE 2019 in Florence, Italy. IEEE Design & Test, 36(4), 59-61.
Spieck, J., Wildermann, S., Schwarzer, T., Teich, J., & Glaß, M. (2019). Data-Driven Scenario-based Application Mapping for Heterogeneous Many-Core Systems. In Multicore/Many-core Systems-on-Chip (MCSoC 2019). Singapore, SG.
Teich, J., & Fummi, F. (Eds.) (2019). Design, Automation & Test in Europe Conference & Exhibition, DATE 2019, Florence, Italy, March 25-29, 2019. .
Fickenscher, J., Hannig, F., & Teich, J. (2019). DSL-based Acceleration of Automotive Environment Perception and Mapping Algorithms for embedded CPUs, GPUs, and FPGAs. In Martin Schoeberl, Christian Hochberger, Sascha Uhrig, Jürgen Brehm, Thilo Pionteck (Eds.), Architecture of Computing Systems -- ARCS 2019 (pp. 71 - 86). Copenhagen, DK: Cham: Springer International Publishing.
Heidorn, C., Witterauf, M., Hannig, F., & Teich, J. (2019). Efficient Mapping of CNNs onto Tightly Coupled Processor Arrays. Journal of Computers, 14(8), 541-556.
Membarth, R., Dutta, H., Hannig, F., & Teich, J. (2019). Efficient Mapping of Streaming Applications for Image Processing on Graphics Cards. In Transactions on High-Performance Embedded Architectures and Compilers V. (pp. 1-20). Springer.
Aliee, H., Khosravi, F., & Teich, J. (2019). Efficient Treatment of Uncertainty in System Reliability Analysis using Importance Measures. In The 49th IEEE/IFIP International Conference on Dependable Systems and Networks (pp. 76-87). Portland, Oregon, USA.
Qiao, B., Reiche, O., Hannig, F., & Teich, J. (2019). From Loop Fusion to Kernel Fusion: A Domain-specific Approach to Locality Optimization. In Proceedings of the 2019 IEEE/ACM International Symposium on Code Generation and Optimization (pp. 242-253). Washington DC, USA, US.

Last updated on 2019-16-08 at 10:01