Hritam Dutta



Organisation


Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


Publications (Download BibTeX)

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Membarth, R., Dutta, H., Hannig, F., & Teich, J. (2019). Efficient Mapping of Streaming Applications for Image Processing on Graphics Cards. In Transactions on High-Performance Embedded Architectures and Compilers V. (pp. 1-20). Springer.
Dutta, H. (2011). Synthesis and Exploration of Loop Accelerators for Systems-on-a-Chip (Dissertation).
Dutta, H., Hannig, F., Schmid, M., & Keinert, J. (2010). Modeling and synthesis of communication subsystems for loop accelerator pipelines. In Proceedings of the 21st IEEE International Conference on Application-specific Systems, Architectures, and Processors (ASAP) (pp. 125-132). Rennes, FR.
Membarth, R., Kutzer, P., Dutta, H., Hannig, F., & Teich, J. (2009). Acceleration of multiresolution imaging algorithms: A comparative study. In Proceedings of the 20th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) (pp. 211-214). Boston, MA, US.
Dutta, H., Kissler, D., Hannig, F., Kupriyanov, O., Teich, J., & Pottier, B. (2009). A Holistic Approach for Tightly Coupled Reconfigurable Parallel Processors. Microprocessors and Microsystems, 33(1), 53-62. https://dx.doi.org/10.1016/j.micpro.2008.08.007
Membarth, R., Hannig, F., Dutta, H., & Teich, J. (2009). Efficient Mapping of Multiresolution Image Filtering Algorithms on Graphics Processors. In Proceedings of the 9th International Workshop on Systems, Architectures,Modeling, and Simulation (SAMOS) (pp. 277-288). Island of Samos, GR: Berlin / Heidelberg: Springer-verlag.
Dutta, H., Zhai, J., Hannig, F., & Teich, J. (2009). Impact of loop tiling on the controller logic of acceleration engines. In Proceedings of 20th IEEE International Conference on Application-specific Systems, Architectures, and Processors (ASAP) (pp. 161-168). Boston, MA, US.
Dutta, H., Zhai, J., Hannig, F., & Teich, J. (2009). Impact of Loop Tiling on the Controller Logic of Hardware Acceleration Engines. In Proceedings of the 20th IEEE International Conference on Application-specific Systems, Architectures, and Processors (pp. 161-168). Boston, MA, US.
Keinert, J., Dutta, H., Hannig, F., Haubelt, C., & Teich, J. (2009). Model-based synthesis and optimization of static multi-rate image processing algorithms. In Proceedings of Design, Automation and Test in Europe (DATE 2009) (pp. 135-140). Nice, FR.
Membarth, R., Hannig, F., Dutta, H., & Teich, J. (2009). Optimization Flow for Algorithm Mapping on Graphics Cards. In Proceedings of ACACES 2009 Poster Abstracts: Advanced Computer Architecture and Compilation for Embedded Systems (pp. 229-232). Barcelona, ES.

Last updated on 2016-08-06 at 02:01