Dr.-Ing. Marc Reichenbach


Lehrstuhl für Informatik 3 (Rechnerarchitektur)

Publications (Download BibTeX)

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Rachuj, S., Herglotz, C., Reichenbach, M., Kaup, A., & Fey, D. (2018). A Hybrid Approach for Runtime Analysis Using a Cycle and Instruction Accurate Model. In Mladen Berekovic, Rainer Buchty, Heiko Hamann, Dirk Koch, Thilo Pionteck (Eds.), 31st International Conference on Architecture of Computing Systems, ARCS 2018 (pp. 85-96). Braunschweig: Springer.
Knödtel, J., Schwabe, W., Lieske, T., Reichenbach, M., & Fey, D. (2018). A Novel Methodology for Evaluating the Energy Consumption of IP Blocks in System-Level Designs. In 2018 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) (pp. 46-53-53). Platja D’Aro, ES.
Vaas, S., Ulbrich, P., Reichenbach, M., & Fey, D. (2018). Application-Specific Tailoring of Multi-Core SoCs for Real-Time Systems with Diverse Predictability Demands. Journal of Signal Processing Systems.
Söll, C., Reichenbach, M., Röber, J., Hagelauer, A., Weigel, R., & Fey, D. (2018). Case Study on Memristor-Based Multilevel Memories. International Journal of Circuit Theory and Applications, 46(1), 99-112. https://dx.doi.org/10.1002/cta.2379
Reichenbach, M., Holzinger, P., Häublein, K., Lieske, T., Blinzer, P., & Fey, D. (2018). Heterogeneous Computing Utilizing FPGAs. Journal of Signal Processing Systems. https://dx.doi.org/10.1007/s11265-018-1382-7
Herglotz, C., Springer, D., Reichenbach, M., Stabernack, B., & Kaup, A. (2018). Modeling the Energy Consumption of the HEVC Decoding Process. IEEE Transactions on Circuits and Systems For Video Technology, 28, 217-229. https://dx.doi.org/10.1109/TCSVT.2016.2598705
Hartmann, C., Häublein, K., Pfundt, B., Reichenbach, M., & Fey, D. (2017). An Image Processing Operator Language for Design and Synthesis of Smart Camera Architectures. In Mitteilungen - Gesellschaft für Informatik e.V. (pp. 1-11). Hagen.
Reichenbach, M., Kasparek, M., Häublein, K., Bauer, J.N., Alawieh, M., & Fey, D. (2017). Fast heterogeneous computing architectures for smart antennas. Journal of Systems Architecture. https://dx.doi.org/10.1016/j.sysarc.2016.11.004
Reichenbach, M., Holzinger, P., Häublein, K., Lieske, T., Blinzer, P., & Fey, D. (2017). LibHSA: One Step Towards Mastering the Era of Heterogeneous Hardware Accelerators using FPGAs. (pp. 1-6-6).
Wust, D., Biglari, M., Knödtel, J., Reichenbach, M., Söll, C., & Fey, D. (2017). Prototyping Memristors in Digital Systems with an FPGA-Based Testing Environment. In Power and Timing Modeling, Optimization and Simulation (PATMOS), 2017 27th International Symposium on (pp. 1-7). Thessaloniki, GR: IEEE.

Last updated on 2018-09-01 at 01:00