Jorge Alfonso Echavarria Gutiérrez



Organisation


Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


Project member


AConFPGA: Approximate Computing on FPGAs
Prof. Dr.-Ing. Jürgen Teich
(13/03/2017)


Publications (Download BibTeX)

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Echavarria Gutiérrez, J.A., Morales-Reyes, A., Cumplido, R., Salido, M., & Feregrino, C. (2019). IP-Cores Watermarking Scheme at Behavioral Level Using Genetic Algorithms. Engineering Applications of Artificial Intelligence.
Echavarria Gutiérrez, J.A., Wildermann, S., & Teich, J. (2018). AConFPGA: A Multiple-Output Boolean Function Approximation DSE Technique Targeting FPGAs. In Proceedings of 2018 International Conference on Field Programmable Technology. Naha, Okinawa, JP.
Echavarria Gutiérrez, J.A., Schütz, K., Becher, A., Wildermann, S., & Teich, J. (2018). Can Approximate Computing Reduce Power Consumption on FPGAs? In Proceedings of IEEE International Conference on Electronics Circuits and Systems. Bordeaux, FR.
Echavarria Gutiérrez, J.A., Wildermann, S., & Teich, J. (2018). Design Space Exploration of Multi-output Logic Function Approximations. In Proceedings of the International Conference On Computer Aided Design (ICCAD 2018) (pp. 52:1 - 52:8). San Diego, CA, US.
Echavarria Gutiérrez, J.A., Schütz, K., Becher, A., Wildermann, S., & Teich, J. (2018). Evaluation of Approximate Computing Techniques for Power Reduction on FPGAs. In Proceedings of the AxC18: 3rd Workshop on Approximate Computing. Swissôtel Bremen, DE.
Echavarria Gutiérrez, J.A., Wildermann, S., Potwigin, E., & Teich, J. (2017). Efficient Arithmetic Error Rate Calculus for Visibility Reduced Approximate Adders. IEEE Embedded Systems Letters, Approximate Computing. https://dx.doi.org/10.1109/LES.2017.2760922
Pirkl, J., Becher, A., Echavarria Gutiérrez, J.A., Teich, J., & Wildermann, S. (2017). Self-Adaptive FPGA-Based Image Processing Filters Using Approximate Arithmetics. In Proceedings of the 20th International Workshop on Software and Compilers for Embedded Systems (pp. 89-92). Sankt Goar, DE.
Becher, A., Echavarria Gutiérrez, J.A., Ziener, D., Wildermann, S., & Teich, J. (2016). A LUT-Based Approximate Adder. In Proceedings of the 24th Annual IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM 2016).. Washington DC, US: IEEE.
Echavarria Gutiérrez, J.A., Wildermann, S., Becher, A., Teich, J., & Ziener, D. (2016). FAU: Fast and Error-Optimized Approximate Adder Units on LUT-Based FPGAs. In Proceedings of 2016 International Conference on Field Programmable Technology (pp. 213-216). Xi'an, CN.
Echavarria Gutiérrez, J.A., Becher, A., Teich, J., & Ziener, D. (2015). Approximate Adder Structures on FPGAs. In Proceedings of the AxC15: 1st Workshop on Approximate Computing. Paderborn, Germany: Paderborn, Germany: Universität Paderborn.

Last updated on 2019-03-05 at 23:51

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