Prof. Dr.-Ing. Dietmar Fey


Lehrstuhl für Informatik 3 (Rechnerarchitektur)

Project member

RTG 1773: Heterogeneous Image Systems
Prof. Dr. Marc Stamminger
(01/10/2012 - 31/03/2017)

Publications (Download BibTeX)

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Fey, D., & Hannig, F. (2018). Special Issue on Heterogeneous Real-Time Image Processing. Journal of Real-Time Image Processing, 14(3), 513-515.
Rachuj, S., Bauer, W., & Fey, D. (2018). Evaluation of a Sensor Fusion Algorithm on a Real-Time Processor. In AmE 2018 - Automotive meets Electronics (pp. 44-48). Dortmund.
Söll, C., Reichenbach, M., Röber, J., Hagelauer, A., Weigel, R., & Fey, D. (2018). Case Study on Memristor-Based Multilevel Memories. International Journal of Circuit Theory and Applications, 46(1), 99-112.
Vaas, S., Ulbrich, P., Reichenbach, M., & Fey, D. (2018). Application-Specific Tailoring of Multi-Core SoCs for Real-Time Systems with Diverse Predictability Demands. Journal of Signal Processing Systems.
Wust, D., Fey, D., & Knödtel, J. (2018). A programmable ternary CPU using hybrid CMOS/memristor circuits. International Journal of Parallel, Emergent and Distributed Systems, 1--21.
Biglari, M., & Fey, D. (2017, March). A Non-Volatile Flip-Flop Using Memristive Voltage Divider. Poster presentation at IEEE/ACM Design Automation and Test in Europe (DATE), Workshop on Emerging Memory Solutions - Technology, Manufacturing, Architectures, Design and Test, Lausanne, Switzerland, CH.
Biglari, M., & Fey, D. (2017). Memristive voltage divider: a bipolar ReRAM-based unit for non-volatile flip-flops. In MEMSYS '17 Proceedings of the International Symposium on Memory Systems (pp. 217-222). Washington DC, USA, US: New York, NY, USA: ACM.
Hofmann, J., Hager, G., Wellein, G., & Fey, D. (2017). An Analysis of Core- and Chip-Level Architectural Features in Four Generations of Intel Server Processors. In High Performance Computing. ISC 2017. Lecture Notes in Computer Science, vol 10266. Frankfurt: Cham: Springer.
Rachuj, S., Hartmann, C., & Fey, D. (2017). Evaluation of a Processor Simulator Exemplified by a Radar Processing Algorithm. In Workshop Proceedings (pp. 96-100). Wien: Wien: VDE Verlag.
Kuckuk, S., Leitenmaier, L., Schmitt, C., Schönwetter, D., Köstler, H., & Fey, D. (2017). Towards Virtual Hardware Prototyping for Generated Geometric Multigrid Solvers.

Last updated on 2016-05-05 at 05:35