Prof. Dr.-Ing. Dietmar Fey


Lehrstuhl für Informatik 3 (Rechnerarchitektur)

Awards / Honours

2018 : Gauss Award

Project member

ESI 2: ESI-Anwendungszentrum für die digitale Automatisierung, den digitalen Sport und die Automobilsensorik der Zukunft
Prof. Dr.-Ing. Jürgen Teich
(01/01/2015 - 31/12/2018)

RTG 1773: Heterogeneous Image Systems
Prof. Dr. Marc Stamminger
(01/10/2012 - 31/03/2017)

Publications (Download BibTeX)

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Rachuj, S., Reichenbach, M., & Fey, D. (2019). A generic functional simulation of heterogeneous systems. In Martin Schoeberl, Thilo Pionteck, Sascha Uhrig, Jürgen Brehm, Christian Hochberger (Eds.), Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (pp. 128-141). Copenhagen, DK: Springer Verlag.
Reuben, J.R., Fey, D., & Wenger, C. (2019). A modeling methodology for resistive RAM based on stanford-PKU model with extended multilevel capability. IEEE Transactions on Nanotechnology, 18, 647-656.
Bauer, W., Holzinger, P., Rachuj, S., Häublein, K., Reichenbach, M., & Fey, D. (2019). Evaluating HSA-Compatible Heterogeneous Systems for ADAS Applications. In Trinitis, Carsten; Pionteck, Thilo (Eds.), Workshop Proceedings (pp. 129-136). Copenhagen, Denmark.
Bauer, W., Holzinger, P., Reichenbach, M., Vaas, S., Hartke, P., & Fey, D. (2019). Programmable HSA Accelerators for Zynq UltraScale+ MPSoC Systems. In Mencagli G, B. Heras D, Cardellini V, Casalicchio E, Jeannot E, Wolf F, Salis A, Schifanella C, Manumachu RR, Ricci L, Beccuti M, Antonelli L, Garcia Sanchez JD, Scott SL (Eds.), Euro-Par 2018: Parallel Processing Workshops (pp. 733-744). Cham: Springer International Publishing.
Biglari, M., Lieske, T., & Fey, D. (2019). Reducing Hibernation Energy and Degradation in Bipolar ReRAM-Based Non-Volatile Processors. IEEE Transactions on Nanotechnology.
Häublein, K., Brückner, W., Vaas, S., Rachuj, S., Reichenbach, M., & Fey, D. (2019). Utilizing PYNQ for Accelerating Image Processing Functions in ADAS Applications. In Trinitis, Carsten ; Pionteck, Thilo (Eds.), Proceedings of the ARCS 2019: 32nd International Conference on Architecture of Computing Systems (pp. 93-100). Copenhagen, DK: VDE Verlag.
Rachuj, S., Herglotz, C., Reichenbach, M., Kaup, A., & Fey, D. (2018). A Hybrid Approach for Runtime Analysis Using a Cycle and Instruction Accurate Model. In Mladen Berekovic, Rainer Buchty, Heiko Hamann, Dirk Koch, Thilo Pionteck (Eds.), 31st International Conference on Architecture of Computing Systems, ARCS 2018 (pp. 85-96). Braunschweig: Springer.
Holzinger, P., Reichenbach, M., & Fey, D. (2018). A New Generic HLS Approach for Heterogeneous Computing: On the Feasibility of High-Level Synthesis in HSA-Compatible Systems. In Mudge Trevor, Pnevmatikatos Dionisios N. (Eds.), SAMOS XVIII: 2018 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (pp. 18-27). Pythagorion, Samos Island, GR: New York, NY, USA: ACM.
Knödtel, J., Schwabe, W., Lieske, T., Reichenbach, M., & Fey, D. (2018). A Novel Methodology for Evaluating the Energy Consumption of IP Blocks in System-Level Designs. In 2018 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) (pp. 46-53-53). Platja D’Aro, ES.
Vaas, S., Ulbrich, P., Reichenbach, M., & Fey, D. (2018). Application-Specific Tailoring of Multi-Core SoCs for Real-Time Systems with Diverse Predictability Demands. Journal of Signal Processing Systems.

Last updated on 2016-05-05 at 05:35