Dr. Jan Eitzinger



Organisation


Regionales Rechenzentrum Erlangen (RRZE)


Project member


ProPE: Process-Oriented Performance Engineering Service Infrastructure for Scientific Software at German HPC Centers
Prof. Dr. Gerhard Wellein
(01/01/2017 - 31/12/2019)

MeTacca: Metaprogrammierung für Beschleunigerarchitekturen
Prof. Dr. Gerhard Wellein; Prof. Dr. Harald Köstler
(01/01/2017 - 31/12/2019)

BEO: BEO - Rationelle Energieverwendung in der Industrie - Prozesswärme
Prof. Dr. Georg Müller; Prof. Dr. Ulrich Rüde
(01/12/2001 - 30/06/2005)

DIME: DIME - Datenlokale Iterationsverfahren zur effizienten Lösung partieller Differentialgleichungen
Arndt Bode; Prof. Dr. Ulrich Rüde
(01/06/2000 - 30/04/2006)


Publications (Download BibTeX)

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Hammer, J., Hager, G., Eitzinger, J., & Wellein, G. (2015). Automatic Loop Kernel Analysis and Performance Modeling With Kerncraft. In Proceedings of the 6th International Workshop on Performance Modeling, Benchmarking, and Simulation of High Performance Computing Systems (pp. 1-11). Austin, TX, USA: New York, NY, USA: ACM.
Hofmann, J., Eitzinger, J., & Fey, D. (2015). Execution-Cache-Memory Performance Model: Introduction and Validation.
Wellein, G., Eitzinger, J., Hager, G., & Röhl, T. (2015). Overhead Analysis of Performance Counter Measurements. (pp. 176-185). Institute of Electrical and Electronics Engineers Inc..
Hofmann, J., Fey, D., Eitzinger, J., Hager, G., & Wellein, G. (2015). Performance analysis of the Kahan-enhanced scalar product on current multicore processors. In Accepted for PPAM 2015 (pp. 1-10). Krakow, Poland, PL.
Hofmann, J., Eitzinger, J., Hager, G., & Wellein, G. (2014). Comparing the Performance of Different x86 SIMD Instruction Sets for a Medical Imaging Application on Modern Multi- and Manycore Chips. In Proceedings of the 2014 Workshop on Programming models for SIMD/Vector processing (pp. 57-64). Orlando, USA: New York, NY, USA: ACM.
Hofmann, J., Eitzinger, J., Hager, G., & Wellein, G. (2014). Performance Engineering for a Medical Imaging Application on the Intel Xeon Phi Accelerator. In ARCS Workshops'14 (pp. 1-8). Lübeck, Germany, DE.
Eitzinger, J., Hager, G., Wellein, G., & Stengel, H. (2014). Quantifying performance bottlenecks of stencil computations using the Execution-Cache-Memory model. (pp. 1-10). Association for Computing Machinery.
Eitzinger, J., Hager, G., Hofmann, H., Hornegger, J., & Wellein, G. (2013). Pushing the limits for medical image reconstruction on recent standard multicore processors. International Journal of High Performance Computing Applications, 27(2), 162-177. https://dx.doi.org/10.1177/1094342012442424
Sembritzki, K., Hager, G., Krammer, B., Eitzinger, J., & Wellein, G. (2012). Evaluation of the Coarray Fortran Programming Model on the Example of a Lattice Boltzmann Code. In PGAS12 (pp. -). Santa Barbara, CA, USA: In Press: ACM Digital Library.
Hager, G., Eitzinger, J., Wellein, G., & Habich, J. (2012). Exploring performance and power properties of modern multicore chips via simple machine models. Concurrency and Computation-Practice & Experience, Submitted, 22.

Last updated on 2018-04-10 at 23:51