Dr.-Ing. Jens Gladigau



Organisation


Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


Project member


SystemC-basierte Performance-Abschätzung des Channel-Subsystems der System z Architektur
Prof. Dr.-Ing. Jürgen Teich
(01/01/2010 - 31/12/2010)

SpecVer: SpecVer: Specification for Verification of complex systems
Prof. Dr.-Ing. Jürgen Teich
(01/10/2005 - 30/09/2008)


Publications (Download BibTeX)

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Gladigau, J. (2013). Combining Formal Model-Based System-Level Design with SystemC Transaction Level Modeling (Dissertation).
Gladigau, J., Haubelt, C., & Teich, J. (2012). Model-Based Virtual Prototype Acceleration. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 31(10), 1572-1585. https://dx.doi.org/10.1109/TCAD.2012.2205148
Kutzer, P., Gladigau, J., Haubelt, C., & Teich, J. (2011). Automatic generation of system-level virtual prototypes from streaming application models. In Proceedings of the 22nd IEEE International Symposium on Rapid System Prototyping (pp. 128-134). Karlsruhe.
Gladigau, J., Gerstlauer, A., Haubelt, C., Streubühr, M., & Teich, J. (2011). Automatic System-Level Synthesis: From Formal Application Models to Generic Bus-Based MPSoCs. LNCS Transactions on High-Performance Embedded Architectures and Compilers, 5(4), 1-22.
Gladigau, J., Gerstlauer, A., Haubelt, C., Streubühr, M., & Teich, J. (2010). A system-level synthesis approach from formal application models to generic bus-based MPSoCs. In Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) (pp. 118-125). Samos, GR.
Streubühr, M., Gladigau, J., Haubelt, C., & Teich, J. (2010). Efficient approximately-timed performance modeling for architectural exploration of MPSoCs.
Streubühr, M., Gladigau, J., Haubelt, C., & Teich, J. (2009). Efficient approximately-timed performance modeling for architectural exploration of MPSoCs. In Forum on specification and Design Languages 2009. Sophia Antipolis.
Gladigau, J., Haubelt, C., & Teich, J. (2009). Symbolic scheduling of SystemC dataflow designs. In M. Radetzki (Eds.), Languages for Embedded Systems and their Applications. (pp. 183-199). Springer.
Keinert, J., Streubühr, M., Schlichter, T., Falk, J., Gladigau, J., Teich, J.,... Meredith, M. (2009). SYSTEMCODESIGNER - An Automatic ESL Synthesis Approach by Design Space Exploration and Behavioral Synthesis for Streaming Applications. ACM Transactions on Design Automation of Electronic Systems, 14(1), 1-23. https://dx.doi.org/10.1145/1455229.1455230
Gladigau, J., Haubelt, C., Streubühr, M., Teich, J., Schneider, A., Knäblein, J., & Lindig, M. (2009). Testfallgenerierung für SystemC-Designs mit abstrakten Modellbeschreibungen. In Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (pp. 157-166). Berlin, DE.

Last updated on 2016-15-08 at 02:01