Yang Xu



Organisationseinheit


Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


Publikationen (Download BibTeX)


Xu, Y., Schebesch, F., Ravikumar, N., & Maier, A. (2019). Detection of Unseen Low-Contrast Signals Using Classic and Novel Model Observers. In Thomas M. Deserno, Andreas Maier, Christoph Palm, Heinz Handels, Klaus H. Maier-Hein, Thomas Tolxdorff (Eds.), Informatik aktuell (pp. 212-217). Lübeck, DE: Springer Berlin Heidelberg.
Wang, B., Xu, Y., Hasholzner, R., Drewes, C., Rosales, R., Graf, S.,... Teich, J. (2016). Exploration of Power Domain Partitioning for Application-Specific SoCs in System-Level Design. In In Proceedings of the 19. GI/ITG/GMM-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2016) (pp. 102-113). Freiburg, DE.
Xu, Y., & Teich, J. (2016). Hierarchical Statistical Leakage Analysis and its Application. ACM Transactions on Design Automation of Electronic Systems.
Xu, Y. (2015). System-Level Power and Performance Estimation in Early SoC Design Phases (Dissertation).
Wang, B., Xu, Y., Rosales, R., Hasholzner, R., Glaß, M., & Teich, J. (2014). End-to-End Power Estimation for Heterogeneous Cellular LTE SoCs in Early Design Phases. In Proceedings of the International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) (pp. 1-8). Palma de Mallorca, ES.
Rosales, R., Glaß, M., Teich, J., Wang, B., Xu, Y., & Hasholzner, R. (2014). MAESTRO - Holistic Actor-oriented Modeling of Non-Functional Properties and Firmware Behavior for MPSoCs. ACM Transactions on Design Automation of Electronic Systems, 19(3), 23:1-23:26. https://dx.doi.org/10.1145/2594481
Xu, Y., Wang, B., & Teich, J. (2014). Parametric Yield Optimization Using Leakage-Yield-Driven Floorplanning. In Proceedings of the International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) (pp. 1-6). Palma de Mallorca, ES.
Rosales, R., Klie, T., Glock, S., Xu, Y., Wang, B., Hasholzner, R.,... Weigel, R. (2012). Eine Aktor-Orientierte Methodik zur Power-Modellierung auf Systemebene. Design & Elektronik, 1-9.

Zuletzt aktualisiert 2016-06-06 um 02:01