Dr.-Ing. Josef Angermeier



Organisationseinheit


Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


Mitarbeit in Forschungsprojekten


SEIS: Sicherheit in eingebetteten IP-basierten Systemen
Prof. Dr.-Ing. Michael Glaß; Prof. Dr.-Ing. Jürgen Teich
(01.01.2009 - 30.06.2012)

(SPP 1148: Rekonfigurierbare Rechensysteme):
ReCoNodes: Optimierungsmethodik zur Steuerung hardwarekonfigurierbarer Knoten
Prof. Dr.-Ing. Jürgen Teich
(01.06.2003 - 31.05.2009)


Publikationen (Download BibTeX)

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Angermeier, J., Teich, J., Kamphans, T., & Fekete, S.P. (2010). Virtual Area Management: Multitasking on Dynamically Partially Reconfigurable Devices. In Proc. 17th Reconfigurable Architectures Workshop (pp. 1-4). Atlanta, US.
Teich, J., Angermeier, J., & Amouri, A. (2009). General methodology for mapping iterative approximation algorithms to adaptive dynamically partially reconfigurable systems. In Proc. 19th International Conference on Field-Programmable Logic and Applications (pp. 302-307). Prague, CZ.
Angermeier, J., Claus, C., Stechele, W., & Teich, J. (2008). A comparison of embedded reconfigurable video-processing architectures. In Proceedings of International Conference on Field-Programmable Logic and Applications (pp. 587-590). Heidelberg, DE: New York: IEEE Press.
Angermeier, J., Hanke, S., Majer, M., Teich, J., & Wildermann, S. (2008). Co-Design Architecture and Implementation for Point-Based Rendering on FPGAs. In Proc. 19th IEEE/IFIP International Symposium on Rapid System Prototyping (pp. 142-148). Monterey, US.
Angermeier, J., & Teich, J. (2008). Heuristics for Scheduling Reconfigurable Devices with Consideration of Reconfiguration Overheads. In Proceedings 15th Reconfigurable Architectures Workshop (pp. 1-8). Miami, Florida, US: New York: IEEE Press.
Fekete, S.P., Kamphans, T., Schweer, N., Tessars, C., Van Der Veen, J.C., Angermeier, J.,... Teich, J. (2008). No-Break Dynamic Defragmentation of Reconfigurable Devices. In Proceedings of International Conference on Field-Programmable Logic and Applications (pp. 113-118). Heidelberg, DE: New York: IEEE Press.
Angermeier, J., Batzer, U., Claus, C., Majer, M., Stechele, W., & Teich, J. (2008). Reconfigurable HW/SW Architecture of a Reconfigurable HW/SW Architecture of a Real-Time Driver Assistance System. In Proceedings of the Fourth International Workshop on Applied Reconfigurable Computing (pp. 149-159). London, GB: Berlin Heidelberg: Springer.
Angermeier, J., Fekete, S.P., Göhringer, D., Majer, M., Teich, J., & Van Der Veen, J.C. (2007). Scheduling and communication-aware mapping of HW-SW modules for dynamically and partially reconfigurable SoC architectures. In Proc. of the 20th International Conference on Architecture of Computing Systems (pp. 151-160). Zurich, CH: Berlin: VDE-Verlag.
Angermeier, J., Göhringer, D., Majer, M., Teich, J., Fekete, S.P., & Van Der Veen, J.C. (2007). The Erlangen Slot Machine: A Platform for Interdisciplinary Research in Reconfigurable Computing. it - Information Technology, 49(3), 143-148.

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