Dr.-Ing. Josef Angermeier



Organisation


Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


Project member


SEIS: Sicherheit in eingebetteten IP-basierten Systemen
Prof. Dr.-Ing. Michael Glaß; Prof. Dr.-Ing. Jürgen Teich
(01/01/2009 - 30/06/2012)

(SPP 1148: Rekonfigurierbare Rechensysteme):
ReCoNodes: Optimization methodologies for reconfiguration management on reconfigurable hardware nodes
Prof. Dr.-Ing. Jürgen Teich
(01/06/2003 - 31/05/2009)


Publications (Download BibTeX)

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Angermeier, J. (2013). Concepts and Algorithms to Increase the Efficiency and Reliability of Reconfigurable Computer (Dissertation).
Fekete, S.P., Kamphans, T., Schweer, N., Tessars, C., Van Der Veen, J.C., Angermeier, J.,... Teich, J. (2012). Dynamic Defragmentation of Reconfigurable Devices. ACM Transactions on Reconfigurable Technology and Systems, 5(2), 1-20. https://dx.doi.org/10.1145/2209285.2209287
Wildermann, S., Angermeier, J., Sibirko, E., & Teich, J. (2012). Placing Multi-mode Streaming Applications on Dynamically Partially Reconfigurable Architectures. International Journal of Reconfigurable Computing, 2012, 1-12. https://dx.doi.org/10.1155/2012/608312
Ziermann, T., Schmidt, B., Mühlenthaler, M., Ziener, D., Angermeier, J., & Teich, J. (2011). An FPGA Implementation of a Threat-based Strategy for Connect6. In Proceedings of the International Conference on Field-Programmable Technology (pp. 1-4). New Delhi, IN: New York, NY, USA: IEEE Press.
Angermeier, J., Sibirko, E., Wanka, R., & Teich, J. (2011). Bitonic Sorting on Dynamically Reconfigurable Architectures. In Proc. IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum (IPDPSW) (pp. 314-317). Anchorage, AL, US: New York, NY, USA: IEEE Press.
Angermeier, J., Ziener, D., Glaß, M., & Teich, J. (2011). Runtime Stress-Aware Replica Placement on Reconfigurable Devices under Safety Constraints. In Proceedings of the International Conference on Field-Programmable Technology. New Delhi, IN: New York, NY, USA: IEEE Press.
Angermeier, J., Ziener, D., Glaß, M., & Teich, J. (2011). Stress-Aware Module Placement on Reconfigurable Devices. In Proceedings of the International Conference on Field-Programmable Logic and Applications (pp. 277-281). Chania, Crete, GR: New York, NY, USA: IEEE Computer Society.
Angermeier, J., Bobda, C., Majer, M., & Teich, J. (2010). Erlangen slot machine: An FPGA-based dynamically reconfigurable computing platform. Springer Netherlands.
Angermeier, J., Wildermann, S., Sibirko, E., & Teich, J. (2010). Placing Streaming Applications with Similarities on Dynamically Partially Reconfigurable Architectures. In Proc. International Conference on ReConFigurable Computing and FPGAs (pp. 91-96). Cancun, MX.
Ahmadinia, A., Angermeier, J., Fekete, S.P., Kamphans, T., Koch, D., Majer, M.,... Van Der Veen, J.C. (2010). ReCoNodes-optimization methods for module scheduling and placement on reconfigurable hardware devices. Springer Netherlands.

Last updated on 2016-20-10 at 02:00