Johannes Hofmann



Organisationseinheit


Lehrstuhl für Informatik 3 (Rechnerarchitektur)


Preise / Auszeichnungen


2018 : Gauss Award


Publikationen (Download BibTeX)

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Laukemann, J., Hammer, J., Hofmann, J., Hager, G., & Wellein, G. (2018). Automated Instruction Stream Throughput Prediction for Intel and AMD Microarchitectures. In 2018 IEEE/ACM Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems (PMBS) (pp. 121-131). Dallas, TX, US: IEEE.
Hofmann, J., Hager, G., & Fey, D. (2018). On the Accuracy and Usefulness of Analytic Energy Models for Contemporary Multicore Processors. In High Performance Computing: 33rd International Conference, ISC High Performance 2018 (pp. 22-43). Frankfurt: Cham: Springer International Publishing.
Hofmann, J., Hager, G., Wellein, G., & Fey, D. (2017). An Analysis of Core- and Chip-Level Architectural Features in Four Generations of Intel Server Processors. In High Performance Computing. ISC 2017. Lecture Notes in Computer Science, vol 10266. Frankfurt: Cham: Springer.
Hofmann, J., Fey, D., Riedmann, M., Eitzinger, J., Hager, G., & Wellein, G. (2017). Performance analysis of the Kahan-enhanced scalar product on current multi-core and many-core processors. Concurrency and Computation-Practice & Experience, 29(9). https://dx.doi.org/10.1002/cpe.3921
Hofmann, J., Fey, D., Eitzinger, J., Hager, G., & Wellein, G. (2016). Analysis of intel’s haswell microarchitecture using the ECM model and microbenchmarks. Springer Verlag.
Hofmann, J., Fey, D., Eitzinger, J., Hager, G., & Wellein, G. (2016). Analysis of Intel's Haswell Microarchitecture Using the ECM Model and Microbenchmarks. In Architecture of Computing Systems -- ARCS 2016: 29th International Conference, Nuremberg, Germany, April 4-7, 2016, Proceedings (pp. 210-222). Nuremberg: Cham: Springer International Publishing.
Hofmann, J., & Fey, D. (2016). An ECM-based Energy-efficiency Optimization Approach for Bandwidth-limited Streaming Kernels on Recent Intel Xeon Processors. In Proceedings of the 4th International Workshop on Energy Efficient Supercomputing (pp. 31-38). Salt Lake City, UT, USA.
Vaas, S., Reichenbach, M., Hofmann, J., Stadelmayer, T., & Fey, D. (2016). Embedded Parallel Computing Accelerators for Smart Control Units of Frequency Converters. In ARCS 2016; 29th International Conference on Architecture of Computing Systems (pp. 1-5). Nuremberg, DE: Nuremberg, Germany: VDE VERLAG GMBH, Berlin, Offenbach.
Hofmann, J., Fey, D., Riedman, M., Eitzinger, J., Hager, G., & Wellein, G. (2016). Performance analysis of the Kahan-enhanced scalar product on current multi-corecore and many-core processors. Concurrency and Computation-Practice & Experience, 28(12). https://dx.doi.org/10.1002/cpe.3921
Hofmann, J., Eitzinger, J., & Fey, D. (2015). Execution-Cache-Memory Performance Model: Introduction and Validation.

Zuletzt aktualisiert 2016-03-06 um 05:02